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Editing cavium/microarchitectures/vulcan (section)

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codenameVulcan +
core count16 +, 20 +, 24 +, 28 +, 30 + and 32 +
designerCavium + and Broadcom +
first launched2018 +
full page namecavium/microarchitectures/vulcan +
instance ofmicroarchitecture +
instruction set architectureARMv8.1 +
manufacturerTSMC +
microarchitecture typeCPU +
nameVulcan +
pipeline stages (max)15 +
pipeline stages (min)13 +
process16 nm (0.016 μm, 1.6e-5 mm) +