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ThunderX1 - Microarchitectures - Cavium
< cavium
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ThunderX1 µarch
General Info
Arch TypeCPU
DesignerCavium
ManufacturerGlobalFoundries
Introduction2014
Process28 nm
Core Configs24, 48
Pipeline
TypeSuperscalar, Superpipeline
Decode4?
Instructions
ISAARMv8.1
ExtensionsNEON, TrustZone
Cache
L1I Cache78 KiB/core
39-way set associative
L1D Cache32 KiB/core
32-way set associative
L2 Cache16 MiB/socket
16-way set associative
Succession

The microarchitecture of the original custom-designed Cavium ThunderX processor might be called ThunderX1 for the purposes of this wiki. [1] [2]

codenameThunderX1 +
core count24 + and 48 +
designerCavium +
first launched2014 +
full page namecavium/microarchitectures/thunderx1 +
instance ofmicroarchitecture +
instruction set architectureARMv8.1 +
manufacturerGlobalFoundries +
microarchitecture typeCPU +
nameThunderX1 +
process28 nm (0.028 μm, 2.8e-5 mm) +