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Difference between revisions of "cavium/ccpi"
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== See also ==
 
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* {{cavium|ThunderX2}}

Latest revision as of 00:56, 22 June 2019

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Cavium Coherent Processor Interconnect (CCPI') is an interconnect architecture designed by Cavium for their microprocessors.

Overview[edit]

CCPI is a cache coherent interconnect architecture designed by Cavium for their various microprocessors. CCPI is used to support symmetric multiprocessing on the ThunderX and ThunderX2 families.

Data Rates[edit]

 CCPICCPI2
Signaling Rate10 GT/s25 GT/s
Lanes/Link2424
Rate/Link30 GB/s
240 Gb/s
75 GB/s
600 Gb/s

See also[edit]