From WikiChip
Revision history of "cavium/thunderx2/cn9978"
View logs for this page

Diff selection: Mark the radio boxes of the revisions to compare and hit enter or the button at the bottom.
Legend: (cur) = difference with latest revision, (prev) = difference with preceding revision, m = minor edit.

Has subobject
"Has subobject" is a predefined property representing a container construct and is provided by Semantic MediaWiki.
ThunderX2 CN9978 - Cavium#pcie +
base frequency1,800 MHz (1.8 GHz, 1,800,000 kHz) +, 2,000 MHz (2 GHz, 2,000,000 kHz) +, 2,100 MHz (2.1 GHz, 2,100,000 kHz) +, 2,200 MHz (2.2 GHz, 2,200,000 kHz) + and 2,300 MHz (2.3 GHz, 2,300,000 kHz) +
core count30 +
designerCavium +
familyThunderX2 +
first announcedMay 7, 2018 +
first launchedMay 7, 2018 +
full page namecavium/thunderx2/cn9978 +
has ecc memory supporttrue +
instance ofmicroprocessor +
isaARMv8.1 +
isa familyARM +
l1$ size1,914.88 KiB (1,960,837.12 B, 1.87 MiB) +
l1d$ description8-way set associative +
l1d$ size960 KiB (983,040 B, 0.938 MiB) +
l1i$ description8-way set associative +
l1i$ size960 KiB (983,040 B, 0.938 MiB) +
l2$ description8-way set associative +
l2$ size7.5 MiB (7,680 KiB, 7,864,320 B, 0.00732 GiB) +
l3$ size30 MiB (30,720 KiB, 31,457,280 B, 0.0293 GiB) +
ldateMay 7, 2018 +
manufacturerTSMC +
market segmentServer +
max cpu count2 +
max memory2,097,152 MiB (2,147,483,648 KiB, 2,199,023,255,552 B, 2,048 GiB, 2 TiB) +
max memory bandwidth158.95 GiB/s (162,764.8 MiB/s, 170.671 GB/s, 170,671.263 MB/s, 0.155 TiB/s, 0.171 TB/s) +
max memory channels8 +
max sata ports2 +
max usb ports2 +
microarchitectureVulcan +
model numberCN9978 +
nameThunderX2 CN9978 +
packageFCLGA-4077 +
part numberCN9978-2300LG4077-Y21-G +, CN9978-2200LG4077-Y21-G +, CN9978-2100LG4077-Y21-G +, CN9978-2000LG4077-Y21-G + and CN9978-1800LG4077-Y21-G +
process16 nm (0.016 μm, 1.6e-5 mm) +
smp max ways2 +
supported memory typeDDR4-2666 +
technologyCMOS +
thread count120 +
word size64 bit (8 octets, 16 nibbles) +