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Difference between revisions of "buffer gate"

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A '''buffer''', is a basic [[logic gate]] that passes its input, unchanged, to its output. It's behavior is the opposite of a [[NOT gate]]. The main purpose of a buffer is to regenerate the input, usually using a strong high and a strong low. A buffer has one input and one output; its input always equals its input. Buffers are also used to increase the propagation delay of circuits by driving the large capacitive loads.
 
A '''buffer''', is a basic [[logic gate]] that passes its input, unchanged, to its output. It's behavior is the opposite of a [[NOT gate]]. The main purpose of a buffer is to regenerate the input, usually using a strong high and a strong low. A buffer has one input and one output; its input always equals its input. Buffers are also used to increase the propagation delay of circuits by driving the large capacitive loads.
  
== Standard symbol ==
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== Description ==
Buffers are typically drown on schematics using one of the three standard symbols:
+
{{expand section}}
 +
A buffer is a very basic active device that generates an output identical to its input input. In most technologies, a buffer is made of two [[inverter]] back-to-back. One of the many purposes for a buffer is to generate weak output from [[non-restoring logic]] that was used.
  
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==Design==
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{{empty section}}
 +
 +
== Symbolic representation ==
 +
Buffers are typically drown on schematics using one of a standard symbol. Below are three of the commonly found standard symbols.
 
{| class="wikitable"
 
{| class="wikitable"
 
|-
 
|-
! ANSI !! IEC !! DIN
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! ANSI !! IEC !! DIN !! British
 
|-
 
|-
| [[File:Buffer gate ansi.svg]] || [[File:Buffer gate iec.svg]] || [[File:Buffer gate din.svg]]
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| [[File:buffer gate (ansi).svg|100px]] || [[File:buffer gate (iec).svg|100px]] || [[File:buffer gate (din).svg|100px]] || [[File:buffer gate (british).svg|100px]]
 
|}
 
|}
  
== CMOS Implementation ==
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==Implementations==
 +
A buffer can be implemented in variety of of technologies.
 +
 
 +
=== CMOS ===
 
A CMOS buffer gate with one input and one output can be realized as simply two [[inverter]]s back to back - built out of just 4 gates.
 
A CMOS buffer gate with one input and one output can be realized as simply two [[inverter]]s back to back - built out of just 4 gates.
  
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[[File:Buffer gate cmos.png|200px]]
 
[[File:Buffer gate cmos.png|200px]]
 
{{clear}}
 
{{clear}}
== Discrete chips ==
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== Discrete Chips ==
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Various buffers/drivers exist chips as well for both [[7400 series]] and [[4000 series]].
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=== [[7400 series]] chips ===
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{{empty section}}
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=== [[4000 series]] chips ===
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{{empty section}}
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The 7407 is a TTL chip with 14 pins. Two pins are used for V<sub>DD</sub> and GND, the other 12 pins are used for the 6 independent buffers. The 4050 is a CMOS Hex Buffer with 16 pins. Two pins are used for V<sub>DD</sub> and GND, 12 pins are used for the 6 independent buffers. Pins 13 and 16 are not connected. Both chips implement the expression Q<sub>N</sub> = A<sub>N</sub>
 
The 7407 is a TTL chip with 14 pins. Two pins are used for V<sub>DD</sub> and GND, the other 12 pins are used for the 6 independent buffers. The 4050 is a CMOS Hex Buffer with 16 pins. Two pins are used for V<sub>DD</sub> and GND, 12 pins are used for the 6 independent buffers. Pins 13 and 16 are not connected. Both chips implement the expression Q<sub>N</sub> = A<sub>N</sub>
  

Revision as of 23:47, 15 December 2015

Buffer Gate
ANSI Symbol
buffer gate (ansi).svg
Functional
buffer gate functional.gif
Truth Table
Inputs Outputs
A Q
0 0
1 1
Other Gates
Buffer TriBuffer NOT
AND OR XOR
NAND NOR XNOR
Trans AOI OAI
MAJ INH IMPLY
NIMPLY
Other Components
Plexers
MUX DEMUX Encoder
Decoder Pri-Encoder
ALU
Adder Subtractor Multiplier
Divider Shifter Rotator
MAC Comparator Negator
Memory
D latch D flip-flop SR latch
JK flip-flop T flip-flop Register
Register file SRAM Counter
ROM CAM DRAM
I/O
Shift register SIPO PISO
ADC DAC

A buffer, is a basic logic gate that passes its input, unchanged, to its output. It's behavior is the opposite of a NOT gate. The main purpose of a buffer is to regenerate the input, usually using a strong high and a strong low. A buffer has one input and one output; its input always equals its input. Buffers are also used to increase the propagation delay of circuits by driving the large capacitive loads.

Description

New text document.svg This section requires expansion; you can help adding the missing info.

A buffer is a very basic active device that generates an output identical to its input input. In most technologies, a buffer is made of two inverter back-to-back. One of the many purposes for a buffer is to generate weak output from non-restoring logic that was used.

Design

New text document.svg This section is empty; you can help add the missing info by editing this page.

Symbolic representation

Buffers are typically drown on schematics using one of a standard symbol. Below are three of the commonly found standard symbols.

ANSI IEC DIN British
buffer gate (ansi).svg buffer gate (iec).svg buffer gate (din).svg buffer gate (british).svg

Implementations

A buffer can be implemented in variety of of technologies.

CMOS

A CMOS buffer gate with one input and one output can be realized as simply two inverters back to back - built out of just 4 gates.

The table on the right shows the states of the four transistors with the various inputs of A.

Buffer Gate by Transistor
A Q1 Q2 Q3 Q4 Q
0 1 0 0 1 0
1 0 1 1 0 1

Buffer gate cmos.png

Discrete Chips

Various buffers/drivers exist chips as well for both 7400 series and 4000 series.

7400 series chips

New text document.svg This section is empty; you can help add the missing info by editing this page.

4000 series chips

New text document.svg This section is empty; you can help add the missing info by editing this page.

The 7407 is a TTL chip with 14 pins. Two pins are used for VDD and GND, the other 12 pins are used for the 6 independent buffers. The 4050 is a CMOS Hex Buffer with 16 pins. Two pins are used for VDD and GND, 12 pins are used for the 6 independent buffers. Pins 13 and 16 are not connected. Both chips implement the expression QN = AN