Semiconductor & Computer Engineering
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Information for "arm holdings/microarchitectures/mlp"
Basic information
| Display title | Machine Learning Processor (MLP) - Microarchitectures - ARM |
| Default sort key | Machine Learning Processor (MLP), ARM Holdings |
| Page length (in bytes) | 9,040 |
| Page ID | 35852 |
| Page content language | English (en) |
| Page content model | wikitext |
| Indexing by robots | Allowed |
| Number of redirects to this page | 2 |
| Counted as a content page | Yes |
| Number of subpages of this page | 0 (0 redirects; 0 non-redirects) |
Page protection
| Edit | Allow all users (infinite) |
| Move | Allow all users (infinite) |
Edit history
| Page creator | David (talk | contribs) |
| Date of page creation | 02:24, 2 February 2020 |
| Latest editor | David (talk | contribs) |
| Date of latest edit | 22:35, 6 February 2020 |
| Total number of edits | 9 |
| Total number of distinct authors | 1 |
| Recent number of edits (within past 90 days) | 0 |
| Recent number of distinct authors | 0 |
Page properties
| Transcluded templates (10) | Templates used on this page:
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| codename | MLP + |
| designer | Arm Holdings + |
| first launched | 2018 + |
| full page name | arm holdings/microarchitectures/mlp + |
| instance of | microarchitecture + |
| manufacturer | TSMC +, Samsung + and UMC + |
| name | MLP + |
| process | 16 nm (0.016 μm, 1.6e-5 mm) + and 7 nm (0.007 μm, 7.0e-6 mm) + |
| processing element count | 4 +, 12 +, 8 + and 16 + |