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Difference between revisions of "arm holdings/microarchitectures/cortex-a73"
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== Architecture ==
 
== Architecture ==
 
=== Key changes from {{\\|Cortex-A72}} ===
 
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=== Block Diagram ===
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=== Memory Hierarchy ===
 
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Revision as of 14:53, 31 December 2018

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Cortex-A73 µarch
General Info
Arch TypeCPU
DesignerARM Holdings
ManufacturerTSMC
IntroductionMay 29, 2016
Instructions
ISAARMv8
Succession

Cortex-A73 (codename Artemis) is the successor to the Cortex-A72, a low-power high-performance ARM microarchitecture designed by ARM Holdings for the mobile market. This microarchitecture is designed as a synthesizable IP core and is sold to other semiconductor companies to be implemented in their own chips. The Cortex-A73, which implemented the ARMv8 ISA, is the a performant core which is often combined with a number of lower power cores (e.g. Cortex-A53) in a big.LITTLE configuration to achieve better energy/performance.

Compiler support

Compiler Arch-Specific Arch-Favorable
Arm Compiler -mcpu=cortex-a73 -mtune=cortex-a73
GCC -mcpu=cortex-a73 -mtune=cortex-a73
LLVM -mcpu=cortex-a73 -mtune=cortex-a73

If the Cortex-A73 is coupled with the Cortex-A53 in a big.LITTLE system, GCC also supports the following option:

Compiler Tune
GCC -mtune=cortex-a73.cortex-a53

Architecture

Key changes from Cortex-A72

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Block Diagram

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Memory Hierarchy

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codenameCortex-A73 +
designerARM Holdings +
first launchedMay 29, 2016 +
full page namearm holdings/microarchitectures/cortex-a73 +
instance ofmicroarchitecture +
instruction set architectureARMv8 +
manufacturerTSMC +
microarchitecture typeCPU +
nameCortex-A73 +