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Latest revision Your text
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{{microarchitecture
 
{{microarchitecture
 
|atype=CPU
 
|atype=CPU
|name=Cortex-A55
+
|name=CPH1911
 
|designer=ARM Holdings
 
|designer=ARM Holdings
|manufacturer=TSMC
 
|manufacturer 2=Samsung
 
|manufacturer 3=GlobalFoundries
 
|manufacturer 4=SMIC
 
 
|introduction=May 29, 2017
 
|introduction=May 29, 2017
 
|process=16 nm
 
|process=16 nm
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|cores 9=8
 
|cores 9=8
 
|type=In-order
 
|type=In-order
|oooe=No
+
|oooe=Yes
 
|speculative=Yes
 
|speculative=Yes
 
|renaming=Yes
 
|renaming=Yes
 
|stages=8
 
|stages=8
|decode=2-way
+
|decode=1-way
 
|isa=ARMv8.2
 
|isa=ARMv8.2
 
|feature=Hardware virtualization
 
|feature=Hardware virtualization

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codenameCortex-A55 +
core count1 +, 2 +, 3 + and 4 +
designerARM Holdings +
first launchedMay 29, 2017 +
full page namearm holdings/microarchitectures/cortex-a55 +
instance ofmicroarchitecture +
instruction set architectureARMv8.2 +
manufacturerTSMC +, Samsung +, GlobalFoundries + and SMIC +
microarchitecture typeCPU +
nameCortex-A55 +
pipeline stages8 +
process16 nm (0.016 μm, 1.6e-5 mm) +, 14 nm (0.014 μm, 1.4e-5 mm) +, 10 nm (0.01 μm, 1.0e-5 mm) +, 7 nm (0.007 μm, 7.0e-6 mm) + and 12 nm (0.012 μm, 1.2e-5 mm) +