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Difference between revisions of "arm/armv8.1"
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(Adding initial take on ARMv8.1 extensions.)
 
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* Large System Extensions (LSE)
 
* Large System Extensions (LSE)
 
** New atomic instructions to support scalable performance:
 
** New atomic instructions to support scalable performance:
** Most of the following have optional load-acquire and/or store-release semantics
+
** Instructions for full-word, half-word, and byte operations are available.
 +
** Most of the following have optional load-acquire and/or store-release semantics.
 
*** Compare and Swap: CAS, CASP (up to 128-bit values).
 
*** Compare and Swap: CAS, CASP (up to 128-bit values).
 
*** Atomic Memory Operations: ADD, CLR, EOR, SET, MAX (signed/unsigned), MIN (signed/unsigned).
 
*** Atomic Memory Operations: ADD, CLR, EOR, SET, MAX (signed/unsigned), MIN (signed/unsigned).
 
**** LD<op> versions return the value of the updated memory (LDADD for example).
 
**** LD<op> versions return the value of the updated memory (LDADD for example).
 
**** ST<op> versions are "fire-and-forget" (STADD for example).
 
**** ST<op> versions are "fire-and-forget" (STADD for example).
**** Instructions for full-word, half-word, and byte operations are available.
+
*** SWAP
 
* Rounding Double Multiply Add/Subtract instruction (RDMA)
 
* Rounding Double Multiply Add/Subtract instruction (RDMA)
 
* Limited Ordering Regions (LOR)
 
* Limited Ordering Regions (LOR)

Revision as of 13:32, 2 April 2019

ARMv8.1 is an extension to ARMv8, an ARM instruction set architecture which brought a large number of fundamental changes to the instruction set, including the introduction of 64-bit operating capabilities.

Mandatory Features from ARMv8.0

  • CRC32 was optional in ARMv8.0, now mandatory.

Mandatory Features in ARMv8.1

  • Large System Extensions (LSE)
    • New atomic instructions to support scalable performance:
    • Instructions for full-word, half-word, and byte operations are available.
    • Most of the following have optional load-acquire and/or store-release semantics.
      • Compare and Swap: CAS, CASP (up to 128-bit values).
      • Atomic Memory Operations: ADD, CLR, EOR, SET, MAX (signed/unsigned), MIN (signed/unsigned).
        • LD<op> versions return the value of the updated memory (LDADD for example).
        • ST<op> versions are "fire-and-forget" (STADD for example).
      • SWAP
  • Rounding Double Multiply Add/Subtract instruction (RDMA)
  • Limited Ordering Regions (LOR)
  • Privileged access never (PAN)
  • Virtualization Host Extensions (VHE)

Optional Features in ARMv8.1

  • Hierarchical permission disables (HPD)
  • 16-bute VMID (VMID16)
  • PMU Extensions (PMU)