Editing ampere computing/emag

{{ampere title|eMAG}}
{{ic family
| title             = eMAG
| image             = emag (front).jpg
| caption           = eMAG 8180, front
| developer         = Ampere Computing
| developer 2       = AppliedMicro
| manufacturer      = TSMC
| type              = Microprocessors
| first announced   = February 5, 2018 
| first launched    = September 8, 2018 
| isa               = ARMv8
| microarch         = Skylark
| microarch 2       = Quicksilver
| word              = 64 bit
| proc              = 16 nm
| proc 2            = 
| tech              = CMOS
| clock             = 
| clock min         = 
| clock max         = 
| package           = 
| package 2         = 
| socket            = 
| socket 2          = 

| succession       = Yes
| predecessor      = X-Gene 2
| predecessor link = apm/x-gene 2
| successor        = 
| successor link   = 
}}
'''eMAG''' is a family of {{arch|64}} high-performance [[ARM]] server microprocessors designed by [[Ampere Computing]] for the data center.

== Overview ==
eMAG is a family of high-performance [[ARM]] server processors designed by [[Ampere Computing]] and introduced in [[2018]]. Ampere's introduction of eMAG to the market concludes the design that started out by [[AppliedMicro]]. eMAG processors targets server workloads capable of taking advantage of a high core count with high throughput.

=== Codenames ===
{| class="wikitable"
|-
! Introduction !! Microarchitecture !! Process !! Cores
|-
| September, [[2018]] || {{ampere|Skylark|l=arch}} || [[14 nm]] || [[16 cores|16]]-[[32 cores|32]]
|-
| September, [[2019]] || {{ampere|Quicksilver|l=arch}} || [[7 nm]] || 80 
|}

== Compiler Support ==
{| class="wikitable"
|-
! Compiler !! Arch-Specific || Arch-Favorable || Arch-Target
|-
| [[GCC]] || <code>-march=armv8-a</code> || <code>-mtune=emag</code> || <code>-mcpu=emag</code>
|-
| [[LLVM]] || <code>-march=armv8-a</code> || <code>-mtune=emag</code> || <code>-mcpu=emag</code>
|}

== Models ==
=== 1st Gen ===
{{see also|apm/microarchitectures/skylark|l1=Skylark µarch}}
First generation eMAG processors are based on the {{ampere|Skylark|l=arch}} microarchitecture, a design that started out by [[AppliedMicro]]. Fabricated on [[TSMC]]'s [[16 nm process|16FF+ process]], those processors feature up to 32 cores operating at up to 3.3 GHz.

* '''Mem:''' 8x DDR4 channels, up to 2666 MT/s with ECC; 1 TiB/socket
* '''I/O:''' 42 PCIe Gen 3 lanes
* '''TDP:''' Up to 125 W

<!-- NOTE: 
           This table is generated automatically from the data in the actual articles.
           If a microprocessor is missing from the list, an appropriate article for it needs to be
           created and tagged accordingly.

           Missing a chip? please dump its name here: https://en.wikichip.org/wiki/WikiChip:wanted_chips
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{{comp table start}}
<table class="comptable sortable tc4">
{{comp table header|main|6:List of Skylark-based Processors}}
{{comp table header|cols|Price|Launched|Cores|L3$|Turbo|TDP}}
{{#ask: [[Category:microprocessor models by ampere computing]] [[microarchitecture::Skylark]]
 |?full page name
 |?model number
 |?release price
 |?first launched
 |?core count
 |?l3$ size
 |?turbo frequency#GHz
 |?tdp
 |format=template
 |template=proc table 3
 |userparam=8
 |mainlabel=-
}}
{{comp table count|ask=[[Category:microprocessor models by ampere computing]] [[microarchitecture::Skylark]]}}
</table>
{{comp table end}}

== 2nd Gen ==
{{see also|ampere computing/microarchitectures/quicksilver|l1=Quicksilver µarch}}
Second generation eMAG processors are planned for 2019. Those chips will be based on Ampere's {{ampere|Quicksilver|l=arch}} microarchitecture and feature an array of new features and improvements.

== See also ==
* Intel {{intel|Xeon Scalable}}
* AMD {{amd|EPYC}}
* Cavium {{cavium|ThunderX2}}
* Qualcomm {{qualcomm|Centriq}}

== Bibliography ==
* David Schor. (February 5, 2018). "''[https://fuse.wikichip.org/news/776/x-gene-3-gets-a-second-chance-at-ampere-with-a-new-32-core-16nm-arm-processor/ X-Gene 3 gets a second chance at Ampere with a new 32-core 16nm ARM processor]''".
* David Schor. (September 19, 2018). "''[https://fuse.wikichip.org/news/1663/ampere-ships-first-gen-arm-server-processors/ Ampere Ships First Gen ARM Server Processors]''".
https://amperecomputing.com/ampere-announces-availability-of-emag-for-hyperscale-cloud-computing-and-unveils-aggressive-multi-generation-roadmap/
* Ampere Announces Availability of eMAG™ for Hyperscale Cloud Computing and Unveils Aggressive, Multi-Generation Roadmap (September 18, 2018)  "''[https://amperecomputing.com/ampere-announces-availability-of-emag-for-hyperscale-cloud-computing-and-unveils-aggressive-multi-generation-roadmap]''".
designer	Ampere Computing + and AppliedMicro +
first announced	February 5, 2018 +
first launched	September 8, 2018 +
full page name	ampere computing/emag +
instance of	microprocessor family +
instruction set architecture	ARMv8 +
main designer	Ampere Computing +
manufacturer	TSMC +
microarchitecture	Skylark + and Quicksilver +
name	eMAG +
process	16 nm (0.016 μm, 1.6e-5 mm) +
technology	CMOS +
word size	64 bit (8 octets, 16 nibbles) +