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'''Ryzen 7 1700''' is a {{arch|64}} [[octa-core]] high-end performance [[x86]] desktop microprocessor introduced by [[AMD]] in early [[2017]]. This processor is based on AMD's {{amd|Zen|Zen microarchitecture|l=arch}} and is fabricated on a [[14 nm process]]. The 1700 operates at a base frequency of 3 GHz with a [[TDP]] of 65 W and a {{amd|Precision Boost|Boost}} frequency of 3.7 GHz. <!-- This MPU supports up to ?? GIB of dual-channel non-ECC? DDR4-???? memory -->
 
'''Ryzen 7 1700''' is a {{arch|64}} [[octa-core]] high-end performance [[x86]] desktop microprocessor introduced by [[AMD]] in early [[2017]]. This processor is based on AMD's {{amd|Zen|Zen microarchitecture|l=arch}} and is fabricated on a [[14 nm process]]. The 1700 operates at a base frequency of 3 GHz with a [[TDP]] of 65 W and a {{amd|Precision Boost|Boost}} frequency of 3.7 GHz. <!-- This MPU supports up to ?? GIB of dual-channel non-ECC? DDR4-???? memory -->
  
 +
 +
{{unknown features}}
 
== Cache ==
 
== Cache ==
 
{{main|amd/microarchitectures/zen#Memory_Hierarchy|l1=Zen § Cache}}
 
{{main|amd/microarchitectures/zen#Memory_Hierarchy|l1=Zen § Cache}}

Revision as of 02:55, 23 February 2017

Template:mpu Ryzen 7 1700 is a 64-bit octa-core high-end performance x86 desktop microprocessor introduced by AMD in early 2017. This processor is based on AMD's Zen microarchitecture and is fabricated on a 14 nm process. The 1700 operates at a base frequency of 3 GHz with a TDP of 65 W and a Boost frequency of 3.7 GHz.


DIL16 Blank.svg Preliminary Data! Information presented in this article deal with a microprocessor or chip that was recently announced or leaked, thus missing information regarding its features and exact specification. Information may be incomplete and can change by final release.

Cache

Main article: Zen § Cache

[Edit/Modify Cache Info]

hierarchy icon.svg
Cache Organization
Cache is a hardware component containing a relatively small and extremely fast memory designed to speed up the performance of a CPU by preparing ahead of time the data it needs to read from a relatively slower medium such as main memory.

The organization and amount of cache can have a large impact on the performance, power consumption, die size, and consequently cost of the IC.

Cache is specified by its size, number of sets, associativity, block size, sub-block size, and fetch and write-back policies.

Note: All units are in kibibytes and mebibytes.
L1$768 KiB
786,432 B
0.75 MiB
L1I$512 KiB
524,288 B
0.5 MiB
8x64 KiB4-way set associative 
L1D$256 KiB
262,144 B
0.25 MiB
8x32 KiB8-way set associativewrite-back

L2$4 MiB
4,096 KiB
4,194,304 B
0.00391 GiB
  8x512 KiB8-way set associativewrite-back

L3$16 MiB
16,384 KiB
16,777,216 B
0.0156 GiB
  4x8 MiB16-way set associative 

Memory controller

New text document.svg This section is empty; you can help add the missing info by editing this page.

Features

Shop

<amazon type="simple-listing1" search-title="AMD Ryzen 7 1700" search-phrase="AMD Ryzen 7 1700" />

Die Shot

See also: Zen § Die Shot
  • 14 nm process
  • 12 metal layers
  • 2,000 meters of signals
  • 4,800,000,000 transistors
  • ~195 mm²

amd zen octa-core die shot.png

Facts about "Ryzen 7 1700 - AMD"
has advanced vector extensionstrue +
has advanced vector extensions 2true +
has featureAdvanced Vector Extensions +, Advanced Vector Extensions 2 + and Advanced Encryption Standard Instruction Set Extension +
has x86 advanced encryption standard instruction set extensiontrue +
l1$ size768 KiB (786,432 B, 0.75 MiB) +
l1d$ description8-way set associative +
l1d$ size256 KiB (262,144 B, 0.25 MiB) +
l1i$ description4-way set associative +
l1i$ size512 KiB (524,288 B, 0.5 MiB) +
l2$ description8-way set associative +
l2$ size4 MiB (4,096 KiB, 4,194,304 B, 0.00391 GiB) +
l3$ description16-way set associative +
l3$ size16 MiB (16,384 KiB, 16,777,216 B, 0.0156 GiB) +