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Difference between revisions of "amd/microarchitectures/zen 5"
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== History ==
 
== History ==
 
Zen 5 was first mentioned by lead architect Michael Clark during a discussion on April 9th, 2018<ref>[https://www.youtube.com/watch?v=iQ_4C2TKHQ0 Ryzen™ Processors: One Year Later]</ref>.
 
Zen 5 was first mentioned by lead architect Michael Clark during a discussion on April 9th, 2018<ref>[https://www.youtube.com/watch?v=iQ_4C2TKHQ0 Ryzen™ Processors: One Year Later]</ref>.
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== Codenames ==
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'''Product Codenames:'''
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{| class="wikitable"
 +
|-
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! Core !! C/T !! Target
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|-
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| {{amd|Turin|l=core}} || Up to ?/? || High-end server [[multiprocessors]]
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|-
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| {{amd|Da Vinci|l=core}} || Up to ?/? || Workstation & enthusiasts market processors
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|-
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| {{amd|Granite Ridge|l=core}} || Up to ?/? || Mainstream to high-end desktops & enthusiasts market processors
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|-
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| {{amd|Strix Point|l=core}} || Up to ?/? || Mainstream desktop & mobile processors with GPU
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|}
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'''Architectural Codenames:'''
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{| class="wikitable"
 +
|-
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! Arch !! Codename
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|-
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| Core || Nirvana
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|-
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| CCD || Eldora
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|}
  
 
== Process Technology ==
 
== Process Technology ==
 
Zen 5 is speculated to be produced on a [[3nm process]].
 
Zen 5 is speculated to be produced on a [[3nm process]].
 
== Codenames ==
 
Turin (EPYC multiprocessor)
 
Da Vinci (Threadripper Pro and Threadripper Workstation and HEDT)
 
Granite Ridge (Desktop CPU)
 
Strix Point (Desktop and Mobile APU with RDNA3 or RDNA4 graphics processor)
 
{{empty section}}
 
  
 
== Architecture ==
 
== Architecture ==

Latest revision as of 22:33, 9 October 2022

Edit Values
Zen 5 µarch
General Info
Arch TypeCPU
DesignerAMD
ManufacturerTSMC or Samsung
Process3 nm
Core Configs256, 224, 192, 144, 128, 96, 72, 64, 56, 48, 32, 28, 36, 24, 18, 12
PE Configs512, 448, 384, 288, 256, 192, 144, 128, 112, 96, 64, 56, 60, 40, 30, 20
Pipeline
TypeSuperscalar
OoOEYes
SpeculativeYes
Reg RenamingYes
Instructions
ISAx86-64, AVX512, AMX (Advanced Matrix Extensions)
Cores
Core NamesTurin (EPYC server multiprocessor),
Da Vinci (Threadripper Workstation),
Granite Ridge (Gaming Desktop CPU),
Strix Point (Gaming APU with RDNA3 or RDNA4)
Succession

Zen 5 is a planned microarchitecture being developed by AMD as a successor to Zen 4.

History[edit]

Zen 5 was first mentioned by lead architect Michael Clark during a discussion on April 9th, 2018[1].

Codenames[edit]

Product Codenames:

Core C/T Target
Turin Up to ?/? High-end server multiprocessors
Da Vinci Up to ?/? Workstation & enthusiasts market processors
Granite Ridge Up to ?/? Mainstream to high-end desktops & enthusiasts market processors
Strix Point Up to ?/? Mainstream desktop & mobile processors with GPU

Architectural Codenames:

Arch Codename
Core Nirvana
CCD Eldora

Process Technology[edit]

Zen 5 is speculated to be produced on a 3nm process.

Architecture[edit]

Little is currently known about the architectural improvements that are being done to Zen 5.

-big.LITTLE design -More IPC and clock speed - possibly more L3 cache per chiplet

Key changes from Zen 4[edit]

New text document.svg This section is empty; you can help add the missing info by editing this page.

Designers[edit]

  • David Suggs, chief architect

Bibliography[edit]

See Also[edit]

codenameZen 5 +
core count256 +, 224 +, 192 +, 144 +, 128 +, 96 +, 72 +, 64 +, 56 +, 48 +, 32 +, 28 +, 36 +, 24 +, 18 + and 12 +
designerAMD +
full page nameamd/microarchitectures/zen 5 +
instance ofmicroarchitecture +
instruction set architecturex86-64 + and AVX512, AMX (Advanced Matrix Extensions) +
manufacturerTSMC or Samsung +
microarchitecture typeCPU +
nameZen 5 +
process3 nm (0.003 μm, 3.0e-6 mm) +
processing element count512 +, 448 +, 384 +, 288 +, 256 +, 192 +, 144 +, 128 +, 112 +, 96 +, 64 +, 56 +, 60 +, 40 +, 30 + and 20 +