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* {{x86|PCID}} - Process Context Identifiers
 
* {{x86|PCID}} - Process Context Identifiers
 
** <code>{{x86|INVPCID}}</code> - Invalidate TLB entry(s) in a specified PCID
 
** <code>{{x86|INVPCID}}</code> - Invalidate TLB entry(s) in a specified PCID
* {{x86|INVLPGB}} - Broadcast TLB flushing
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** <code>{{x86|INVLPGB}}</code> - Invalidate TLB entry(s) with broadcast to all processors
** <code>INVLPGB</code> - Invalidate TLB entry(s) with broadcast to all processors
 
 
** <code>TLBSYNC</code> - Synchronize TLB invalidations
 
** <code>TLBSYNC</code> - Synchronize TLB invalidations
 
* {{x86|PKU}} - Memory Protection Keys for Users
 
* {{x86|PKU}} - Memory Protection Keys for Users

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codenameZen 3 +
core count64 +, 56 +, 48 +, 32 +, 28 +, 24 +, 16 +, 12 +, 8 + and 6 +
designerAMD +
first launchedOctober 8, 2020 +
full page nameamd/microarchitectures/zen 3 +
instance ofmicroarchitecture +
instruction set architecturex86-64 +
manufacturerTSMC + and GlobalFoundries +
microarchitecture typeCPU +
nameZen 3 +
pipeline stages19 +