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AMD-K6-IIIE+/450ACR - AMD
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Revision as of 20:12, 9 September 2016 by David (talk | contribs) (Graphics)

Template:mpu AMD-K6-IIIE+/450ACR is a 32-bit x86 embedded microprocessor designed by AMD and introduced in late 2000. This MPU which was manufactured on a 0.18 µm process, based on K6-III microarchitecture, operated at 450 MHz with a bus of 100 MHz and a multiplier of 4.5. This chip had a TDP of 12 W.

Cache

Main article: K6-III § Cache

L3$ can be 512 KB to 2 MB, depending on manufacturer and motherboard model. L3$ is off-chip.

Cache Info [Edit Values]
L1I$ 32 KB
"KB" is not declared as a valid unit of measurement for this property.
1x32 KB 2-way set associative
L1D$ 32 KB
"KB" is not declared as a valid unit of measurement for this property.
1x32 KB 2-way set associative
L2$ 256 KB
"KB" is not declared as a valid unit of measurement for this property.
1x256 4-way set associative (shared)

Graphics

This processors has no integrated graphics processing unit.

Features

Template:mpu features

  • Auto-power down state
  • Stop clock state
  • Halt state
l1d$ description2-way set associative +
l1i$ description2-way set associative +
l2$ description4-way set associative +