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EPYC 7252P - AMD
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EPYC 7252P
General Info
DesignerAMD
ManufacturerTSMC, GlobalFoundries
Model Number7252P
Part Number100-000000081
MarketServer
IntroductionAugust 7, 2019 (announced)
August 7, 2019 (launched)
ShopAmazon
General Specs
FamilyEPYC
Series7002
LockedYes
Frequency2,800 MHz
Turbo Frequency3,200 MHz
Clock multiplier28
Microarchitecture
ISAx86-64 (x86)
MicroarchitectureZen 2
Core NameRome
Core Family23
Process7 nm, 14 nm
TechnologyCMOS
MCPYes (3 dies)
Word Size64 bit
Cores8
Threads16
Max Memory4 TiB
Multiprocessing
Max SMP1-Way (Uniprocessor)
Electrical
TDP120 W
Packaging
PackageFCLGA-4094 (LGA)
Dimension58.5 mm × 75.4 mm
Pitch1.00 mm
Contacts4094
SocketSocket SP3, LGA-4094

EPYC 7252P is a 64-bit octa-core x86 server microprocessor designed and introduced by AMD in mid-2019. This multi-chip processor, which is based on the Zen 2 microarchitecture, incorporates logic fabricated TSMC 7 nm process and I/O fabricated on GlobalFoundries 14 nm process. The 7252P has a TDP of 120 W with a base frequency of 2.8 GHz and a boost frequency of up to 3.2 GHz. This processor supports single-socket configurations only and up to 4 TiB of eight channels DDR4-3200 memory per socket.

Cache

Main article: Zen 2 § Cache

[Edit/Modify Cache Info]

hierarchy icon.svg
Cache Organization
Cache is a hardware component containing a relatively small and extremely fast memory designed to speed up the performance of a CPU by preparing ahead of time the data it needs to read from a relatively slower medium such as main memory.

The organization and amount of cache can have a large impact on the performance, power consumption, die size, and consequently cost of the IC.

Cache is specified by its size, number of sets, associativity, block size, sub-block size, and fetch and write-back policies.

Note: All units are in kibibytes and mebibytes.
L1$512 KiB
0.5 MiB
524,288 B
4.882812e-4 GiB
L1I$256 KiB
0.25 MiB
262,144 B
2.441406e-4 GiB
8x32 KiB8-way set associative 
L1D$256 KiB
0.25 MiB
262,144 B
2.441406e-4 GiB
8x32 KiB8-way set associative 

L2$4 MiB
4,096 KiB
4,194,304 B
0.00391 GiB
  8x512 KiB8-way set associativewrite-back

L3$64 MiB
65,536 KiB
67,108,864 B
0.0625 GiB
  4x16 MiB  
Facts about "EPYC 7232P - AMD"
base frequency2,800 MHz (2.8 GHz, 2,800,000 kHz) +
clock multiplier28 +
core count8 +
core family23 +
core nameRome +
designerAMD +
die count3 +
familyEPYC +
first announcedAugust 7, 2019 +
first launchedAugust 7, 2019 +
full page nameamd/epyc/7232p +
has locked clock multipliertrue +
instance ofmicroprocessor +
is multi-chip packagetrue +
isax86-64 +
isa familyx86 +
l1$ size0.5 MiB (512 KiB, 524,288 B, 4.882812e-4 GiB) +
l1d$ description8-way set associative +
l1d$ size0.25 MiB (256 KiB, 262,144 B, 2.441406e-4 GiB) +
l1i$ description8-way set associative +
l1i$ size0.25 MiB (256 KiB, 262,144 B, 2.441406e-4 GiB) +
l2$ description8-way set associative +
l2$ size4 MiB (4,096 KiB, 4,194,304 B, 0.00391 GiB) +
l3$ size64 MiB (65,536 KiB, 67,108,864 B, 0.0625 GiB) +
ldateAugust 7, 2019 +
manufacturerTSMC + and GlobalFoundries +
market segmentServer +
max cpu count1 +
max memory4,194,304 MiB (4,294,967,296 KiB, 4,398,046,511,104 B, 4,096 GiB, 4 TiB) +
microarchitectureZen 2 +
model number7252P +
nameEPYC 7252P +
packageFCLGA-4094 +
part number100-000000081 +
process7 nm (0.007 μm, 7.0e-6 mm) + and 14 nm (0.014 μm, 1.4e-5 mm) +
series7002 +
smp max ways1 +
socketSocket SP3 + and LGA-4094 +
tdp120 W (120,000 mW, 0.161 hp, 0.12 kW) +
technologyCMOS +
thread count16 +
turbo frequency3,200 MHz (3.2 GHz, 3,200,000 kHz) +
word size64 bit (8 octets, 16 nibbles) +