From WikiChip
Difference between revisions of "amd/am486/am486dx4-90"
< amd‎ | am486

(→‎Cache)
Line 81: Line 81:
 
{{main|intel/microarchitectures/80486#Memory_Hierarchy|l1=80486 § Cache}}
 
{{main|intel/microarchitectures/80486#Memory_Hierarchy|l1=80486 § Cache}}
 
{{cache info
 
{{cache info
−
|l1 cache=8 KB
+
|l1 cache=8 KiB
−
|l1 break=1x8 KB
+
|l1 break=1x8 KiB
 
|l1 desc=4-way set associative
 
|l1 desc=4-way set associative
 
|l1 extra=(unified, write-through policy)
 
|l1 extra=(unified, write-through policy)

Revision as of 22:43, 20 September 2016

Template:mpu Am486DX4-90 was an 80486-compatible microprocessor introduced by AMD in 1994. This processor had a clock multiplier of 3 having base frequency of 90 MHz with a bus frequency of 30 MHz.

Cache

Main article: 80486 § Cache
Cache Info [Edit Values]
L1$ 8 KiB
8,192 B
0.00781 MiB
1x8 KiB 4-way set associative (unified, write-through policy)

Graphics

This chip had no integrated graphics processing unit.

See also

Retrieved from "https://en.wikichip.org/w/index.php?title=amd/am486/am486dx4-90&oldid=25398"
Facts about "Am486DX4-90 - AMD"
RDF feed
l1$ description4-way set associative +
l1$ size8 KiB (8,192 B, 0.00781 MiB) +