From WikiChip
Difference between revisions of "amd/am486/am486dx2-50"
< amd‎ | am486

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m (Bot: corrected mem)
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| thread count        =  
 
| thread count        =  
 
| max cpus            = 1
 
| max cpus            = 1
| max memory          = 4 GB
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| max memory          = 4 GiB
 
| max memory addr    =  
 
| max memory addr    =  
  

Revision as of 02:15, 23 June 2017

Template:mpu Am486DX2-50 was an 80486-compatible microprocessor introduced by AMD in 1993. This processor had a clock multiplier of 2 having base frequency of 50 MHz with a FSB frequency of 25 MHz.

Cache

Main article: 80486 § Cache
Cache Info [Edit Values]
L1$ 8 KiB
8,192 B
0.00781 MiB
1x8 KiB 4-way set associative (unified, write-through policy)

Graphics

This chip had no integrated graphics processing unit.

See also

Facts about "Am486DX2-50 - AMD"
l1$ description4-way set associative +
l1$ size8 KiB (8,192 B, 0.00781 MiB) +