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| | {{amd title|Am2900}} | | {{amd title|Am2900}} |
| − | {{ic family
| + | The '''AMD Am2900''' is a [[microprocessor family|family]] of [[4-bit architecture|4-bit]] [[bit-slice microprocessor|bit-slice]] chips designed by [[Advanced Micro Devices]] and introduced to the market in August 1975. Each component represents an individual unit in a microprocessor. Designed to be flexible and expandable, those chips were capable of emulating a large number of existing systems. Made in bipolar technology allowed for higher speeds (8.3-12Mhz, later up to 32). Its flexibility, higher speed, unusually large amount of 2nd sources, and good marketing allowed AMD to dominate the [[bit-slice microprocessor|bit-slice]] market. To date, the Am2900 family is used as the de facto baseline for bit-slice design. |
| − | | title = AMD Am2900
| |
| − | | image = Ic-photo-AMD--AM2903ADCB-(AM2900).png
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| − | | caption = Am2903 Enhanced ALU
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| − | | developer = AMD
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| − | | manufacturer = AMD
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| − | | type = microprocessors
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| − | | production start = 1975
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| − | | production end = 1998
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| − | | arch = 4-bit bit-slice
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| − | | word = 4 bit
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| − | | proc = <!-- process, e.g. "8 μm" -->
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| − | | tech = Bipolar
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| − | | clock min = 1 MHz
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| − | | clock max = 31 MHz
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| − | | package = DIP40
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| − | | package 2 = FP42
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| − | }}
| |
| − | The '''AMD Am2900''' is a [[microprocessor family|family]] of [[4-bit architecture|4-bit]] [[bit-slice microprocessor|bit-slice]] chips designed by [[Advanced Micro Devices]] and introduced to the market in August [[1975]]. Each component represents an individual unit in a microprocessor. Designed to be flexible and expandable, those chips were capable of emulating a large number of existing systems. Made in bipolar technology allowed for higher speeds (1-20Mhz, later up to 32). Its flexibility, higher speed, unusually large amount of 2nd sources, and good marketing allowed AMD to dominate the [[bit-slice microprocessor|bit-slice]] market. The Am2900 family became very popular then and was used as the de facto baseline for bit-slice design. | |
| | | | |
| − | == Design ==
| + | {| class="wikitable" style="float: right;" |
| − | The family includes two {{arch|4}} [[ALU]]s - ''2901'' and a ''2903''. The {{amd|AM2901}}/{{amd|AM2901A|A}} was the original chip designed, supporting 8 different basic operations. The {{amd|AM2903}}/{{amd|AM2903A|A}} was an enhanced version designed a bit later to provide a more sophisticated 3-port, 3-address architecture, including 7 additional operations to support multiplication and division. The slices can be stacked to produce any multiple of 4-bit wide data path (8, 12, 16, 32, etc. bits) and memory address for use in larger systems.
| + | ! colspan="2" | Family Members |
| − | | |
| − | {{expand section}}
| |
| − | | |
| − | == 2nd sources ==
| |
| − | The ''Am2900'' had a large number of 2nd sources:
| |
| − | | |
| − | {| class="wikitable" style="border-collapse:collapse;" | |
| − | ! 75 || 76 || 77 || 78 || 79 || 80 || 81 || 82 || 83 || 84 || 85 || 86 || 87 || 88 || 89 || 90 || 91 || 92 || 93 || 94 || 95 || 96 | |
| − | |-
| |
| − | | colspan="9" style="background: #E8E8E8;" | [[Motorola]]
| |
| − | |-
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| − | | colspan="22" style="background: #E8E8E8;" | [[Thomson-CSF]]
| |
| − | |-
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| − | | colspan="7" style="background: #E8E8E8;" | [[Raytheon]]
| |
| − | |-
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| − | | colspan="2" style="border: none;" | || colspan="15" style="background: #E8E8E8;" | [[National]]
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| − | |-
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| − | | colspan="3" style="border: none;" | || colspan="6" style="background: #E8E8E8;" | [[Fairchild]]
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| − | |-
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| − | | colspan="3" style="border: none;" | || colspan="3" style="background: #E8E8E8;" | [[Signetics]]
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| − | |-
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| − | | colspan="3" style="border: none;" | || colspan="6" style="background: #E8E8E8;" | [[NEC]]
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| − | |-
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| − | | colspan="5" style="border: none;" | || colspan="2" style="background: #E8E8E8;" | [[OKI]]
| |
| − | |-
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| − | | colspan="10" style="border: none;" | || colspan="7" style="background: #E8E8E8;" | [[Cypress]]
| |
| − | |-
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| − | | colspan="11" style="border: none;" | || colspan="3" style="background: #E8E8E8;" | [[Vitesse]]
| |
| − | |-
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| − | | colspan="11" style="border: none;" | || colspan="11" style="background: #E8E8E8;" | [[ВЗПП (VZPP-USSR)]]
| |
| − | |}
| |
| − | | |
| − | == Members ==
| |
| − | {| class="wikitable"
| |
| − | ! colspan="3" | Family Members
| |
| − | |-
| |
| − | ! Part !! Description !! Pin count
| |
| − | |-
| |
| − | | {{\|AM2901}}<br />{{\|AM2901A}}<br />{{\|AM2901B}} || [[4-bit architecture|4-bit]] [[ALU]] || 40, 42
| |
| − | |-
| |
| − | | {{\|AM2901C}} || [[4-bit architecture|4-bit]] [[ALU]], internal [[ECL]] circuitry, ultrafast plug-in replacement for the {{amd|AM2901B|2901B}} || 40, 42, 44
| |
| − | |-
| |
| − | | {{\|AM2902}} || [[Carry-lookahead generator]] || 16, 20
| |
| − | |-
| |
| − | | {{\|AM2903}}<br />{{\|AM2903A}} || [[4-bit architecture|4-bit]] [[ALU]], enhanced version of the {{amd|AM2901|2901}} || 48, 52
| |
| − | |-
| |
| − | | {{\|AM29203}} || [[4-bit architecture|4-bit]] [[ALU]], enhanced version of the {{amd|AM2903|2903}} supporting BCD arithmetics || 48, 52
| |
| − | |-
| |
| − | | {{\|AM2904}} || Status and shift control unit || 40, 42, 44
| |
| − | |-
| |
| − | | {{\|AM2905}} || Quad 2-input bus transceiver || 24
| |
| − | |-
| |
| − | | {{\|AM2906}} || Quad 2-input bus transceiver with parity || 24
| |
| − | |-
| |
| − | | {{\|AM2907}}<br />{{\|AM2908}} || Quad bus transceiver with interface logic || 20
| |
| − | |-
| |
| − | | {{\|AM2909}}<br />{{\|AM2909A}} || 4-bit slice cascadable microprogram address sequencer || 28
| |
| − | |-
| |
| − | | {{\|AM2910}}<br />{{\|AM2910A}} || 12-bit microprogram address sequencer and controller || 40, 42, 44
| |
| − | |-
| |
| − | | {{\|AM2911}}<br />{{\|AM2911A}} || 4-bit slice cascadable microprogram address sequencer || 20
| |
| − | |-
| |
| − | | {{\|AM2912}} || Quad bus transceiver || 16
| |
| | |- | | |- |
| − | | {{\|AM2913}} || Priority [[interrupt]] expander || 20
| + | ! Part !! Description |
| | |- | | |- |
| − | | {{\|AM2914}} || Vectored priority [[interrupt]] controller || 40, 42, 44 | + | | {{amd|AM2901}}<br />{{amd|AM2901A}}<br />{{amd|AM2901B}} || [[4-bit architecture|4-bit]] [[ALU]] |
| | |- | | |- |
| − | | {{\|AM2915}}<br />{{\|AM2915A}}<br />{{\|AM2916}}<br />{{\|AM2916A}} || Quad 3-state registered bus transceiver with 2-port input || 24 | + | | {{amd|AM2902}} || [[Carry-lookahead generator]] |
| | |- | | |- |
| − | | {{\|AM2917}}<br />{{\|AM2917A}} || Quad 3-state registered bus transceiver || 20 | + | | {{amd|AM2903}}<br />{{amd|AM2903A}} || [[4-bit architecture|4-bit]] [[ALU]], Enhanced version of the {{amd|AM2901|2901}} |
| | |- | | |- |
| − | | {{\|AM2918}}<br />{{\|AM29LS18}} || Quad D register with standard and 3-state outputs || 16, 20 | + | | {{amd|AM2904}} || Status and shift control unit |
| | |- | | |- |
| − | | {{\|AM2919}} || Quad D register with dual 3-state outputs || 20 | + | | {{amd|AM2905}} || Quad 2-input bus transceiver |
| | |- | | |- |
| − | | {{\|AM2920}} || Octal D [[flip-flop]] register with 3-state control || 22, 24, 28 | + | | {{amd|AM2906}} || Quad 2-input bus transceiver with parity |
| | |- | | |- |
| − | | {{\|AM2921}} || 1-to-8 [[decoder]] with 3-state outputs || 20 | + | | {{amd|AM2907}}<br />{{amd|AM2908}} || Quad bus transceiver with interface logic |
| | |- | | |- |
| − | | {{\|AM2922}} || 8-input multiplexer ([[MUX]]) with control register || 20 | + | | {{amd|AM2909}}<br />{{amd|AM2909A}}<br />{{amd|AM2911}} || 4-bit-slice address sequencer |
| | |- | | |- |
| − | | {{\|AM2923}} || 8-input multiplexer ([[MUX]]) || 16, 20 | + | | {{amd|AM2910}} || 12-bit address sequencer |
| | |- | | |- |
| − | | {{\|AM2924}} || 3-to-8 [[decoder]]/[[demultiplexer]] || 16, 20 | + | | {{amd|AM2912}} || Quad bus transceiver |
| | |- | | |- |
| − | | {{\|AM2925}} || [[clock generator|Clock generator]] and [[microcycle]] length controller || 24, 28 | + | | {{amd|AM2913}} || Priority [[interrupt]] expander |
| | |- | | |- |
| − | | {{\|AM2926}}<br />{{\|AM2929}} || 3-state quad bus driver and receiver || 16 | + | | {{amd|AM2914}} || Priority [[interrupt]] controller |
| | |- | | |- |
| − | | {{\|AM2927}}<br />{{\|AM2928}} || Quad 3-state bus transceiver || 20, 28 | + | | {{amd|AM2915}}<br />{{amd|AM2916}}<br />{{amd|AM2917}} || Quad 3-state bus transceiver |
| | |- | | |- |
| − | | {{\|AM2930}} || Program control unit, 4-bit slice address controller for memories || 28 | + | | {{amd|AM2918}}<br />{{amd|AM29LS18}} || Quad D register |
| | |- | | |- |
| − | | {{\|AM2932}} || Program control unit with push/pop stack, 4-bit slice address controller for memories || 20, 28 | + | | {{amd|AM2919}} || Quad register |
| | |- | | |- |
| − | | {{\|AM2940}} || [[direct memory access|DMA]] address generator, cascadable 8-bit slice || 28 | + | | {{amd|AM2920}} || Octal D [[flip-flip]] register |
| | |- | | |- |
| − | | {{\|AM2942}} || Programmable [[timer]]/[[counter]] or [[direct memory access|DMA]] address generator || 22, 28 | + | | {{amd|AM2921}} || 1-to-8 [[decoder]] |
| | |- | | |- |
| − | | {{\|AM2946}}<br />{{\|AM2947}}<br />{{\|AM2948}}<br />{{\|AM2949}} || Octal 3-state bidirectional bus transceiver || 20 | + | | {{amd|AM2922}}<br />{{amd|AM2923}} || 8-input [[MUX]] |
| | |- | | |- |
| − | | {{\|AM2950}}<br />{{\|AM2951}} || 8-bit bidirectional I/O port with handshake, back-to-back registers || 28 | + | | {{amd|AM2924}} || 3-to-8 [[decoder]] |
| | |- | | |- |
| − | | {{\|AM2952}}<br />{{\|AM2953}} || 8-bit bidirectional I/O port, back-to-back registers || 24 | + | | {{amd|AM2925}} || [[Clock generator]] |
| | |- | | |- |
| − | | {{\|AM2954}}<br />{{\|AM2955}} || Octal registers || 20 | + | | {{amd|AM2926}}<br />{{amd|AM2929}} || 3-state quad bus driver |
| | |- | | |- |
| − | | {{\|AM2956}}<br />{{\|AM2957}} || Octal latches || 20 | + | | {{amd|AM2927}}<br />{{amd|AM2928}} || Quad 3-state Bus Transceiver |
| | |- | | |- |
| − | | {{\|AM2958}}<br />{{\|AM2959}} || Octal buffer || 20 | + | | {{amd|AM2930}} || Program control unit |
| | |- | | |- |
| − | | {{\|AM2960}}<br />{{\|AM2960A}} || Cascadable 16-bit error detection and correction unit || 48, 52, 68 | + | | {{amd|AM2932}} || Program control unit for push/pop stack |
| | |- | | |- |
| − | | {{\|AM2961}}<br />{{\|AM2962}} || 4-bit error correction multiple bus buffer || 24 | + | | {{amd|AM2940}} || [[direct memory access|DMA]] Address generator |
| | |- | | |- |
| − | | {{\|AM2964}}<br />{{\|AM2964B}} || Dynamic memory controller supporting 16K and 64K [[mosfet|MOS]] dynamic [[random access memory|RAM]] || 40, 44 | + | | {{amd|AM2940}} || [[Timer]]/[[Counter]]/[[direct memory access|DMA]] Address generator |
| | |- | | |- |
| − | | {{\|AM2965}}<br />{{\|AM2966}} || Octal dynamic memory driver || 20 | + | | {{amd|AM2946}}<br />{{amd|AM2947}}<br />{{amd|AM2948}}<br />{{amd|AM2949}} || Octal 3-state bidirectional bus transceiver |
| | |- | | |- |
| − | | {{\|AM2968A}} || Dynamic memory controller supporting 16K, 64K and 256K [[mosfet|MOS]] dynamic [[random access memory|RAM]] || 48, 68 | + | | {{amd|AM2950}}<br />{{amd|AM2951}} || Bidirectional I/O Port |
| | |- | | |- |
| − | | {{\|AM2969}} || Memory timing controller with [[error detection and correction|EDC]] timing control, supporting 64K, 256K, 1M and 4M [[mosfet|MOS]] dynamic [[random access memory|RAM]] || 48, 68 | + | | {{amd|AM2954}}<br />{{amd|AM2955}} || Octal registers |
| | |- | | |- |
| − | | {{\|AM2970}} || Memory timing controller supporting 64K, 256K, 1M and 4M [[mosfet|MOS]] dynamic [[random access memory|RAM]] || 24 | + | | {{amd|AM2956}}<br />{{amd|AM2957}} || Octal latches |
| | |- | | |- |
| − | | {{\|AM2971}}<br />{{\|AM2971A}} || Programmable event generator of 12 simultaneous timing sequences || 24, 44 | + | | {{amd|AM2958}}<br />{{amd|AM2959}} || Octal buffer |
| | |- | | |- |
| − | | {{\|AM29700}}<br />{{\|AM29701}} || 16-word by 4-bit Schottky [[random access memory|RAM]] || 16 | + | | {{amd|AM2960}} || 16-bit error detection and correction unit |
| | |- | | |- |
| − | | {{\|AM29702}}<br />{{\|AM29703}} || 16-word by 4-bit Schottky [[random access memory|RAM]] || 16 | + | | {{amd|AM2961}}<br />{{amd|AM2962}} || 4-bit error correction bus buffer |
| | |- | | |- |
| − | | {{\|AM29704}}<br />{{\|AM29705}}<br />{{\|AM29705A}} || 16-word by 4-bit, 2-port [[random access memory|RAM]] || 28 | + | | {{amd|AM2964}} || Dynamic memory controller |
| | |- | | |- |
| − | | {{\|AM29707}} || 16-word by 4-bit, 2-port [[random access memory|RAM]] for use with {{\|AM29203}} || 28 | + | | {{amd|AM2965}}<br />{{amd|AM2966}} || Octal dynamic memory driver |
| − | |-
| |
| − | | {{\|AM29720}}<br />{{\|AM29721}} || 256-word by 1-bit low-power Schottky [[random access memory|RAM]] || 16
| |
| − | |-
| |
| − | | {{\|AM29750A}}<br />{{\|AM29751A}} || 32-word by 8-bit bipolar [[programmable read-only memory|PROM]] || 16
| |
| − | |-
| |
| − | | {{\|AM29760A}}<br />{{\|AM29761A}} || 256-word by 4-bit bipolar [[programmable read-only memory|PROM]] || 16
| |
| − | |-
| |
| − | | {{\|AM29770}}<br />{{\|AM29771}} || 512-word by 4-bit bipolar [[programmable read-only memory|PROM]] || 16
| |
| − | |-
| |
| − | | {{\|AM29774}}<br />{{\|AM29775}} || 512-word by 8-bit bipolar [[programmable read-only memory|PROM]] with register || 22
| |
| − | |-
| |
| − | | {{\|AM29803A}} || 16-way branch control unit for use with {{\|AM2909A}} || 16
| |
| − | |-
| |
| − | | {{\|AM29811A}} || Next address control unit for use with {{\|AM2911A}} || 16
| |
| | |} | | |} |
| | + | == 2nd sources == |
| | + | The ''Am2900'' had a large number of 2nd sources: |
| | + | |
| | + | * [[Elektronika]] |
| | + | * [[Fairchild]] |
| | + | * [[Motorola]], October 1975 |
| | + | * [[National]] |
| | + | * [[NEC]] |
| | + | * [[Raytheon]], December 1975 |
| | + | * [[Signetics]] |
| | + | * [[Thomson-CSF]] |
| | + | * [[Vitesse]], November 1985 |
| | + | |
| | + | == Design == |
| | + | The family includes two [[4-bit architecture|4-bit]] [[ALU]]s - ''2901'' and a ''2903''. The {{amd|AM2901}}/{{amd|AM2901A|A}} was the original chip designed, supporting 8 different basic operations. The {{amd|AM2903}}/{{amd|AM2903A|A}} was an enhanced version designed a bit later which included 7 additional operations. The slices can be stacked to produce 8, 12, or 16 data paths and memory addresses for use in larger programs. |
| | + | |
| | + | {{empty section}} |
| | | | |
| − | == Documents ==
| |
| | | | |
| − | === Databooks ===
| |
| − | * [[:File:The Am2900 Family Data Book With Related Support Circuits (1979).pdf|The Am2900 Family Data Book With Related Support Circuits (1979)]]
| |
| | | | |
| | + | {{stub}} |
| | + | {{DEFAULTSORT:Am2900}} |
| | [[Category:AMD microprocessors]] | | [[Category:AMD microprocessors]] |
| | [[Category:4-bit microprocessors]] | | [[Category:4-bit microprocessors]] |
