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Information for "amd/cores/rome"

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Display titleRome - Cores - AMD
Default sort keyRome, AMD
Page length (in bytes)6,333
Page ID18127
Page content languageEnglish (en)
Page content modelwikitext
Indexing by robotsAllowed
Number of redirects to this page1
Counted as a content pageYes
Number of subpages of this page0 (0 redirects; 0 non-redirects)

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Edit history

Page creatorInject (talk | contribs)
Date of page creation19:26, 16 May 2017
Latest editorDavid (talk | contribs)
Date of latest edit16:47, 15 April 2020
Total number of edits38
Total number of distinct authors8
Recent number of edits (within past 90 days)0
Recent number of distinct authors0

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Facts about "Rome - Cores - AMD"
back imageFile:amd rome (back).jpg +
designerAMD +
first announcedMay 16, 2017 +
first launchedAugust 7, 2019 +
instance ofcore +
isax86-64 +
isa familyx86 +
main imageFile:amd rome (front).jpg +
main image captionPackage front +
manufacturerTSMC + and GlobalFoundries +
microarchitectureZen 2 +
nameRome +
packageSP3 + and FCLGA-4094 +
process7 nm (0.007 μm, 7.0e-6 mm) + and 14 nm (0.014 μm, 1.4e-5 mm) +
socketSP3 + and LGA-4094 +
technologyCMOS +
word size64 bit (8 octets, 16 nibbles) +