From WikiChip
Difference between revisions of "ambric/am2000/am2029"
< ambric‎ | am2000

Line 40: Line 40:
 
| thread count        =  
 
| thread count        =  
 
| max cpus            =  
 
| max cpus            =  
| max memory          =  
+
| max memory          = 4 GB
  
 
| electrical          =  
 
| electrical          =  
Line 95: Line 95:
 
| bandwidth schan    =  
 
| bandwidth schan    =  
 
| bandwidth dchan    =  
 
| bandwidth dchan    =  
| max memory        =  
+
| max memory        = 4 GB
 
}}
 
}}
  

Revision as of 18:05, 24 June 2016

Template:mpu Am2029 was an MPPA introduced in late 2007 by Ambric. This model was made of roughly 29 Brics arranged as a grid, making up a total of 216 32-bit RICS-like cores operating asynchronously at 1-350 MHz.

Architecture

Main article: Am2000 § Architecture

The Am2029 is made of 16 homogeneous 'Brics' laid out in a grid to form 216 cores.

General layout:

  • 29x Brics

Memory controller

Integrated Memory Controller
Type DDR2-400
Controllers 2
Channels 1
Max memory 4 GB

Expansions

  • PCIe
  • JTAG
  • 128x GPIO @ 100 MHz
  • serial flash
Facts about "Am2029 - Ambric"
has featurePCIe +, JTAG +, GPIO + and serial flash +