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Alchemy Au1000-400MCC
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Alchemy Au1000-400MCC
General Info
DesignerAlchemy
ManufacturerTSMC
Model NumberAu1000-400MCC
Part NumberAu1000-400MCC
MarketEmbedded
IntroductionJune 13, 2000 (announced)
February 2001 (launched)
Release Price$39 (tray)
General Specs
FamilyAlchemy
Frequency400 MHz
Microarchitecture
ISAMIPS32
MicroarchitectureAu1
Core SteppingDA, HA, HB, HC, HD
Process180 nm
TechnologyCMOS
Word Size32 bit
Cores1
Max Memory192 MiB
Multiprocessing
Max SMP1-Way (Uniprocessor)
Electrical
Vcore1.5 V ± 5%
VI/O3.3 V
TDP (Typical)500 mW
Tcase0 °C – 85 °C
Tstorage-40 °C – 125 °C

Au1000-400MCC was a 32-bit ultra low power embedded microprocessor with an Au1 CPU core implementing the MIPS32 ISA. Designed by Alchemy Semiconductor and fabricated on a TSMC 180 nm LV process, this SoC operates at a base frequency of up to 400 MHz with a typical TDP of 500 mW.

Cache

Main article: Au1 § Cache

[Edit/Modify Cache Info]

hierarchy icon.svg
Cache Organization
Cache is a hardware component containing a relatively small and extremely fast memory designed to speed up the performance of a CPU by preparing ahead of time the data it needs to read from a relatively slower medium such as main memory.

The organization and amount of cache can have a large impact on the performance, power consumption, die size, and consequently cost of the IC.

Cache is specified by its size, number of sets, associativity, block size, sub-block size, and fetch and write-back policies.

Note: All units are in kibibytes and mebibytes.
L1$32 KiB
32,768 B
0.0313 MiB
L1I$16 KiB
16,384 B
0.0156 MiB
1 × 16 KiB4-way set associative 
L1D$16 KiB
16,384 B
0.0156 MiB
1 × 16 KiB4-way set associativewrite-back

Memory controller

Au1000 processors integrate two independent memory controllers, a DRAM controller which supports SDRAM, SMROM, and SyncFlash, and a static bus controller which supports SRAM, ROM, Flash memory, PCMCIA/CompactFlash devices, and I/O peripherals such as an external LCD controller. SDRAM runs at one half of the frequency of the internal 32-bit System Bus, which runs at up to one half of the CPU core frequency.

[Edit/Modify Memory Info]

ram icons.svg
Integrated Memory Controller
Max TypeSDR-133
Supports ECCNo
Max Mem192 MiB
Controllers1
Channels1
Width32 bit
Max Bandwidth0.400 GB/s
0.373 GiB/s
381.47 MiB/s
400 MB/s
3.637979e-4 TiB/s
4.0e-4 TB/s

Expansions

  • USB 1.1 (OHCI) host controller, USB 1.1 device controller
    • Two USB host ports and one device port
  • Two 10/100 Mbit/s Ethernet MAC controllers
  • Low speed interfaces AC97, I2S, Fast IrDA, 2 × SSI, 4 × UART, and up to 32 GPIOs

Graphics

This processor has no integrated graphics processing unit.

Features

  • 8-channel DMA engine
  • RTC and TOY timer
  • Two interrupt controllers
  • Power management unit
  • MIPS EJTAG interface
  • Idle Mode, Sleep Mode

Package

  • 324-pin low profile, fine pitch plastic ball grid array (LF-PBGA) package
  • 22 × 22 grid, 1.0 mm pitch
  • 23 mm × 23 mm × 1.5 mm

Bibliography

Facts about "Alchemy Au1000-400MCC"
base frequency400 MHz (0.4 GHz, 400,000 kHz) +
core count1 +
core steppingDA +, HA +, HB +, HC + and HD +
core voltage1.5 V (15 dV, 150 cV, 1,500 mV) +
core voltage tolerance5% +
designerAlchemy +
familyAlchemy +
first announcedJune 13, 2000 +
first launchedFebruary 2001 +
full page namealchemy/au1000-400mcc +
has ecc memory supportfalse +
instance ofmicroprocessor +
io voltage3.3 V (33 dV, 330 cV, 3,300 mV) +
isaMIPS32 +
l1$ size32 KiB (32,768 B, 0.0313 MiB) +
l1d$ description4-way set associative +
l1d$ size16 KiB (16,384 B, 0.0156 MiB) +
l1i$ description4-way set associative +
l1i$ size16 KiB (16,384 B, 0.0156 MiB) +
ldateFebruary 2001 +
manufacturerTSMC +
market segmentEmbedded +
max case temperature358.15 K (85 °C, 185 °F, 644.67 °R) +
max cpu count1 +
max memory192 MiB (196,608 KiB, 201,326,592 B, 0.188 GiB, 1.831055e-4 TiB) +
max memory bandwidth0.373 GiB/s (381.47 MiB/s, 0.4 GB/s, 400 MB/s, 3.637979e-4 TiB/s, 4.0e-4 TB/s) +
max memory channels1 +
max storage temperature398.15 K (125 °C, 257 °F, 716.67 °R) +
microarchitectureAu1 +
min case temperature273.15 K (0 °C, 32 °F, 491.67 °R) +
min storage temperature233.15 K (-40 °C, -40 °F, 419.67 °R) +
model numberAu1000-400MCC +
nameAlchemy Au1000-400MCC +
part numberAu1000-400MCC +
process180 nm (0.18 μm, 1.8e-4 mm) +
release price$ 39.00 (€ 35.10, £ 31.59, ¥ 4,029.87) +
release price (tray)$ 39.00 (€ 35.10, £ 31.59, ¥ 4,029.87) +
smp max ways1 +
supported memory typeSDR-133 +
tdp (typical)0.5 W (500 mW, 6.705e-4 hp, 5.0e-4 kW) +
technologyCMOS +
word size32 bit (4 octets, 8 nibbles) +