Semiconductor & Computer Engineering
From WikiChip
Difference between revisions of "Template:x86 features"
(linked to TBMT) |
(+avx512vnni, dlboost, bfloat16) |
||
| Line 23: | Line 23: | ||
-->{{#if: {{istrue|{{{avx|}}}}} | <tr><th style="width: 100px;">AVX</th><td>{{x86|AVX|Advanced Vector Extensions}}</td></tr>[[has feature::Advanced Vector Extensions| ]][[has advanced vector extensions::true| ]] }}<!-- | -->{{#if: {{istrue|{{{avx|}}}}} | <tr><th style="width: 100px;">AVX</th><td>{{x86|AVX|Advanced Vector Extensions}}</td></tr>[[has feature::Advanced Vector Extensions| ]][[has advanced vector extensions::true| ]] }}<!-- | ||
-->{{#if: {{istrue|{{{avx2|}}}}} | <tr><th style="width: 100px;">AVX2</th><td>{{x86|AVX2|Advanced Vector Extensions 2}}</td></tr>[[has feature::Advanced Vector Extensions 2| ]][[has advanced vector extensions 2::true| ]] }}<!-- | -->{{#if: {{istrue|{{{avx2|}}}}} | <tr><th style="width: 100px;">AVX2</th><td>{{x86|AVX2|Advanced Vector Extensions 2}}</td></tr>[[has feature::Advanced Vector Extensions 2| ]][[has advanced vector extensions 2::true| ]] }}<!-- | ||
| − | -->{{#if: {{istrue|{{{avx512f|{{{avx512cd|{{{avx512er|{{{avx512pf|{{{avx512bw|{{{avx512dq|{{{avx512vl|{{{avx512ifma|{{{avx512vbmi|{{{avx5124fmaps|{{{avx5124vnniw|{{{avx512vpopcntdq|}}}}}}}}}}}}}}}}}}}}}}}}}}}}}}}}}}}}}} | <tr><th style="width: 100px;">AVX-512</th><td>{{x86|avx-512|Advanced Vector 512-bit}} {{#if: {{{avx512units|}}}|([[number of avx-512 execution units::{{{avx512units}}}]] Unit{{#ifexpr: {{{avx512units}}} > 1|s}})}}</td></tr> }}<!-- | + | -->{{#if: {{istrue|{{{avx512f|{{{avx512cd|{{{avx512er|{{{avx512pf|{{{avx512bw|{{{avx512dq|{{{avx512vl|{{{avx512ifma|{{{avx512vbmi|{{{avx5124fmaps|{{{avx5124vnniw|{{{avx512vpopcntdq|{{{avx512vnni|}}}}}}}}}}}}}}}}}}}}}}}}}}}}}}}}}}}}}}}}} | <tr><th style="width: 100px;">AVX-512</th><td>{{x86|avx-512|Advanced Vector 512-bit}} {{#if: {{{avx512units|}}}|([[number of avx-512 execution units::{{{avx512units}}}]] Unit{{#ifexpr: {{{avx512units}}} > 1|s}})}}</td></tr> }}<!-- |
-->{{#if: {{istrue|{{{avx512f|}}}}} | <tr><th style="width: 100px;">AVX512F</th><td>AVX-512 Foundation</td></tr> }}<!-- | -->{{#if: {{istrue|{{{avx512f|}}}}} | <tr><th style="width: 100px;">AVX512F</th><td>AVX-512 Foundation</td></tr> }}<!-- | ||
-->{{#if: {{istrue|{{{avx512cd|}}}}} | <tr><th style="width: 100px;">AVX512CD</th><td>AVX-512 Conflict Detection</td></tr> }}<!-- | -->{{#if: {{istrue|{{{avx512cd|}}}}} | <tr><th style="width: 100px;">AVX512CD</th><td>AVX-512 Conflict Detection</td></tr> }}<!-- | ||
| Line 34: | Line 34: | ||
-->{{#if: {{istrue|{{{avx512vbmi|}}}}} | <tr><th style="width: 100px;">AVX512VBMI</th><td>AVX-512 Vector Bit Manipulation</td></tr> }}<!-- | -->{{#if: {{istrue|{{{avx512vbmi|}}}}} | <tr><th style="width: 100px;">AVX512VBMI</th><td>AVX-512 Vector Bit Manipulation</td></tr> }}<!-- | ||
-->{{#if: {{istrue|{{{avx5124fmaps|}}}}} | <tr><th style="width: 100px;">AVX5124FMAPS</th><td>AVX-512 Fused Multiply Accumulation Packed Single precision</td></tr> }}<!-- | -->{{#if: {{istrue|{{{avx5124fmaps|}}}}} | <tr><th style="width: 100px;">AVX5124FMAPS</th><td>AVX-512 Fused Multiply Accumulation Packed Single precision</td></tr> }}<!-- | ||
| + | -->{{#if: {{istrue|{{{avx512vnni|}}}}} | <tr><th style="width: 100px;">AVX512VNNI</th><td>{{x86|avx512vnni|AVX-512 Vector Neural Network Instructions}}</td></tr> }}<!-- | ||
-->{{#if: {{istrue|{{{avx5124vnniw|}}}}} | <tr><th style="width: 100px;">AVX5124VNNIW</th><td>AVX-512 Vector Neural Network Instructions Word Variable Precision</td></tr> }}<!-- | -->{{#if: {{istrue|{{{avx5124vnniw|}}}}} | <tr><th style="width: 100px;">AVX5124VNNIW</th><td>AVX-512 Vector Neural Network Instructions Word Variable Precision</td></tr> }}<!-- | ||
-->{{#if: {{istrue|{{{avx512vpopcntdq|}}}}} | <tr><th style="width: 100px;">AVX512VPOPCNTDQ</th><td>AVX-512 Vector Population Count Doubleword and Quadword </td></tr> }}<!-- | -->{{#if: {{istrue|{{{avx512vpopcntdq|}}}}} | <tr><th style="width: 100px;">AVX512VPOPCNTDQ</th><td>AVX-512 Vector Population Count Doubleword and Quadword </td></tr> }}<!-- | ||
| Line 49: | Line 50: | ||
-->{{#if: {{istrue|{{{clmul|}}}}} | <tr><th style="width: 100px;">CLMUL</th><td>{{x86|CLMUL|Carry-less Multiplication Extension}}</td></tr> }}<!-- | -->{{#if: {{istrue|{{{clmul|}}}}} | <tr><th style="width: 100px;">CLMUL</th><td>{{x86|CLMUL|Carry-less Multiplication Extension}}</td></tr> }}<!-- | ||
-->{{#if: {{istrue|{{{f16c|}}}}} | <tr><th style="width: 100px;">F16C</th><td>16-bit Floating Point Conversion</td></tr> }}<!-- | -->{{#if: {{istrue|{{{f16c|}}}}} | <tr><th style="width: 100px;">F16C</th><td>16-bit Floating Point Conversion</td></tr> }}<!-- | ||
| + | -->{{#if: {{istrue|{{{bfloat16|}}}}} | <tr><th style="width: 100px;">bfloat16</th><td>[[bfloat16|Brain floating-point format]]</td></tr> }}<!-- | ||
--></table> | --></table> | ||
<table class="tl1" style="font-size: 0.9em; float: left; margin-right: 10px;"><!-- | <table class="tl1" style="font-size: 0.9em; float: left; margin-right: 10px;"><!-- | ||
| Line 97: | Line 99: | ||
-->{{#if: {{istrue|{{{mwt|}}}}} | <tr><th style="width: 100px;">MWT</th><td>My WiFi Technology</td></tr>[[has feature::My WiFi Technology| ]][[has intel my wifi technology support::true| ]] }}<!-- | -->{{#if: {{istrue|{{{mwt|}}}}} | <tr><th style="width: 100px;">MWT</th><td>My WiFi Technology</td></tr>[[has feature::My WiFi Technology| ]][[has intel my wifi technology support::true| ]] }}<!-- | ||
-->{{#if: {{istrue|{{{sipp|}}}}} | <tr><th style="width: 100px;">SIPP</th><td>Stable Image Platform Program</td></tr>[[has feature::Stable Image Platform Program| ]][[has intel stable image platform program support::true| ]] }}<!-- | -->{{#if: {{istrue|{{{sipp|}}}}} | <tr><th style="width: 100px;">SIPP</th><td>Stable Image Platform Program</td></tr>[[has feature::Stable Image Platform Program| ]][[has intel stable image platform program support::true| ]] }}<!-- | ||
| + | -->{{#if: {{istrue|{{{dlboost|}}}}} | <tr><th style="width: 100px;">DL Boost</th><td>{{intel|dl boost|Deep Learning Boost}}</td></tr> }}<!-- | ||
-->{{#if: {{istrue|{{{att|}}}}} | <tr><th style="width: 100px;">ATT</th><td>Anti-Theft Technology</td></tr> }}<!-- | -->{{#if: {{istrue|{{{att|}}}}} | <tr><th style="width: 100px;">ATT</th><td>Anti-Theft Technology</td></tr> }}<!-- | ||
-->{{#if: {{istrue|{{{ipt|}}}}} | <tr><th style="width: 100px;">IPT</th><td>Identity Protection Technology</td></tr>[[has feature::Identity Protection Technology| ]][[has intel identity protection technology support::true| ]] }}<!-- | -->{{#if: {{istrue|{{{ipt|}}}}} | <tr><th style="width: 100px;">IPT</th><td>Identity Protection Technology</td></tr>[[has feature::Identity Protection Technology| ]][[has intel identity protection technology support::true| ]] }}<!-- | ||
Revision as of 01:22, 19 November 2018
[Edit/Modify Supported Features]
 |
Supported x86 Extensions & Processor Features
|
|
|
|
||
