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Difference between revisions of "Template:logic gate"

 
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<includeonly>{| style="border: solid 1px #e5e5ff; width: 250px; float: right;"
+
<includeonly>{{logic device
| style="text-align: center; background: #ccffcc; font-size: 16px;" | '''{{{name}}}'''
+
|title            = {{{title}}}
|-
+
|symbol title    = ANSI Symbol
| style="text-align: center; font-size: 16px;" | ANSI Symbol
+
|symbol body      = [[File:{{lc:{{{name}}}}} gate (ansi).svg|150px|center]]
|-
+
|functional body  = [[File:{{lc:{{{name}}}}} gate functional.gif|center]]
| [[File:and gate (ansi).svg|150px|center]]
+
|truth table      = {{truth table/{{lc:{{{name}}}}}}}
|-
+
}}</includeonly><noinclude>
| style="text-align: center; font-size: 16px; padding-top: 10px;" | Functional
 
|-
 
| [[File:and gate functional.gif|center]]
 
|-
 
| style="text-align: center; font-size: 16px; padding-top: 10px;" | Truth Table
 
|-
 
|
 
{| class="wikitable" style="width:100%; text-align: center;"
 
! colspan="2" | Inputs !! Outputs
 
|-
 
! A !! B !! Q
 
|-
 
| 0 || 0 || 0
 
|-
 
| 0 || 1 || 0
 
|-
 
| 1 || 0 || 0
 
|-
 
| 1 || 1 || 1
 
|}
 
|-
 
|
 
{| class="wikitable mw-collapsible mw-collapsed" style="margin: 0px; width:100%; text-align: center; padding-top: 0px;"
 
| style="font-size: 0.8em;" | Other Gates
 
|-
 
|
 
{| style="width:100%;"
 
| [[buffer gate|Buffer]] || [[Tri-state Buffer]] || [[NOT]]
 
|-
 
| [[AND]] || [[OR]] || [[XOR]]
 
|-
 
| [[NAND]] || [[NOR]] || [[XNOR]]
 
|-
 
| [[IMPLY]] || [[NIMPLY]] || [[INH]]
 
|}
 
|}
 
|-
 
|
 
{| class="wikitable mw-collapsible mw-collapsed" style="margin: 0px; width:100%; text-align: center;"
 
| style="font-size: 0.8em;" | Other Components
 
|-
 
|
 
{| style="width:100%;"
 
! colspan="3" | Plexers
 
|-
 
| [[MUX]] || [[DEMUX]] || [[encoder (circuit)|Encoder]]
 
|-
 
| [[decoder (circuit)|Decoder]] || [[priority encoder|Pri-Encoder]]
 
|-
 
! colspan="3" | [[ALU]]
 
|-
 
| [[Adder]] || [[Subtractor]] || [[Multiplier]]
 
|-
 
| [[Divider]] || [[Shifter]] || [[Rotator]]
 
|-
 
| [[Comparator]] || [[Negator]]
 
|-
 
! colspan="3" | Memory
 
|-
 
| [[D latch]] || [[D flip-flop]] || [[SR latch]]
 
|-
 
| [[JK flip-flop]] || [[T flip-flop]] || [[Register]]
 
|-
 
| [[Register file]] || [[SRAM]] || [[Counter]]
 
|-
 
| [[ROM]] || [[CAM]] || [[DRAM]]
 
|-
 
! colspan="3" | I/O
 
|-
 
| [[Shift register]] || [[SIPO]] || [[PISO]]
 
|-
 
| [[ADC]] || [[DAC]]
 
|}
 
|}
 
|}</includeonly><noinclude>
 
 
{{documentation}}
 
{{documentation}}
 
</noinclude>
 
</noinclude>

Latest revision as of 19:09, 24 November 2015


AND Gate
ANSI Symbol
and gate (ansi).svg
Functional
and gate functional.gif
Truth Table
Inputs Outputs
A B Q
0 0 0
0 1 0
1 0 0
1 1 1
Other Gates
Buffer TriBuffer NOT
AND OR XOR
NAND NOR XNOR
Trans AOI OAI
MAJ INH IMPLY
NIMPLY
Other Components
Plexers
MUX DEMUX Encoder
Decoder Pri-Encoder
ALU
Adder Subtractor Multiplier
Divider Shifter Rotator
MAC Comparator Negator
Memory
D latch D flip-flop SR latch
JK flip-flop T flip-flop Register
Register file SRAM Counter
ROM CAM DRAM
I/O
Shift register SIPO PISO
ADC DAC
{{logic gate
|title = AND Gate
|name = AND
}}