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Template:cache size
Revision as of 10:32, 26 November 2016 by David (talk | contribs)

[Edit/Modify Cache Info]

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Cache Organization
Cache is a hardware component containing a relatively small and extremely fast memory designed to speed up the performance of a CPU by preparing ahead of time the data it needs to read from a relatively slower medium such as main memory.

The organization and amount of cache can have a large impact on the performance, power consumption, die size, and consequently cost of the IC.

Cache is specified by its size, number of sets, associativity, block size, sub-block size, and fetch and write-back policies.

Note: All units are in kibibytes and mebibytes.
L1${{{l1 cache}}}
  {{{l1 break}}} {{{l1 policy}}}
L2${{{l2 cache}}}
  {{{l2 break}}} {{{l2 policy}}}
L3${{{l3 cache}}}
  {{{l13 break}}} {{{l3 policy}}}
L4${{{l4 cache}}}
  {{{l14 break}}} {{{l4 policy}}}