From WikiChip
Difference between revisions of "Talk:intel/microarchitectures/spring hill"
< Talk:intel‎ | microarchitectures

(You really are my best shot fellas ((: new section)
m (Undo revision 95645 by 188.163.109.153 (talk))
 
(12 intermediate revisions by 5 users not shown)
Line 5: Line 5:
  
 
:Spring Hill is a single die SoC. The second die on the package is actually the chipset and Intel confirmed it's the same {{intel|ice lake (client)#PCH|PCH as Ice Lake|l=arch}}. I added that information to the article. --[[User:David|David]] ([[User talk:David|talk]]) 04:50, 22 October 2019 (EDT)
 
:Spring Hill is a single die SoC. The second die on the package is actually the chipset and Intel confirmed it's the same {{intel|ice lake (client)#PCH|PCH as Ice Lake|l=arch}}. I added that information to the article. --[[User:David|David]] ([[User talk:David|talk]]) 04:50, 22 October 2019 (EDT)
 
== You really are my best shot fellas (( ==
 
 
I love all your posts. You've done fantastic job
 
writingexpositoryessay64.blogspot.com
 
writingessayforcollege716.blogspot.com
 
collegeadmissionessays449.blogspot.com
 
purposeofwritinganessay956.blogspot.com
 
ramapocollegeessay112.blogspot.com
 

Latest revision as of 10:03, 29 January 2020

This is the discussion page for the intel/microarchitectures/spring hill page.

2 chips[edit]

Any idea how the circuits are partitioned across the two chips shown in the package on the M.2 module? 82.102.30.46 14:05, 21 October 2019 (EDT)

Spring Hill is a single die SoC. The second die on the package is actually the chipset and Intel confirmed it's the same PCH as Ice Lake. I added that information to the article. --David (talk) 04:50, 22 October 2019 (EDT)