From WikiChip
Difference between revisions of "6 µm lithography process"

(Industry)
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| nMOS/pMOS || depletion-mode nMOS || nMOS/pMOS/CMOS ||
 
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| 3" || || ||

Revision as of 22:41, 26 April 2016

The 6μm lithography process was the semiconductor process technology used by some semiconductor companies during the early to mid 1970s. This process was later superseded by 5 µm, 3 µm, and 2 µm processes.

Industry

Fab
Process Name​
1st Production​
Contacted Gate Pitch​
Interconnect Pitch​
Metal Layers​
Technology​
Wafer
Intel Motorola AMI AMD
 
1971 1971
 ? nm  ? nm  ? nm  ? nm
 ? nm  ? nm  ? nm  ? nm
2 2
nMOS/pMOS depletion-mode nMOS nMOS/pMOS/CMOS
3"

6μm Microprocessors

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6μm Chips


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