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45 nm lithography process
Revision as of 19:57, 30 November 2016 by David (talk | contribs) (Industry)

The 45 nanometer (45 nm) lithography process is a full node semiconductor manufacturing process following the 55 nm process stopgap. Commercial integrated circuit manufacturing using 45 nm process began in 2007. This technology was superseded by the 40 nm process (HN) / 32 nm process (FN) in 2010.

Industry

Fab
Process Name​
1st Production​
Type​
Wafer​
 ​
Contacted Gate Pitch​
Interconnect Pitch (M1P)​
SRAM bit cell (HD)​
SRAM bit cell (LP)​
DRAM bit cell
Intel Fujitsu TI Toshiba / Sony / NEC IBM / Toshiba / Sony / AMD
P1266 CS-300
2007 2008 2008 2006 2007
Bulk PDSOI
300mm
Value 65 nm Δ Value 65 nm Δ Value 65 nm Δ Value 65 nm Δ Value 65 nm Δ
180 nm 0.82x 190 nm  ?x  ? nm  ?x 180 nm  ?x 190 nm 0.76x
160 nm 0.76x  ? nm  ?x  ? nm  ?x  ? nm  ?x  ? nm  ?x
0.346 µm² 0.61x 0.225 µm²  ?x 0.255 µm²  ?x 0.248 µm²  ?x 0.370 µm² 0.57x
0.382 µm² 0.56x
0.067 µm² 0.53x

Design Rules

45 nm Microprocessors

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45 nm Microarchitectures

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