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Difference between revisions of "2 µm lithography process"

(Industry)
 
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== Industry ==
 
== Industry ==
{{scrolling table/top|style=text-align: right; | first=Fab
+
{{#invoke:process nodes
  |Process Name
+
| compare
  |1st Production
+
| fab 1 name link  = intel
  |Contacted Gate Pitch
+
| fab 1 proc name  = CHMOS II
  |Interconnect Pitch (M1P)
+
| fab 1 name        = Intel
  |SRAM bit cell
+
| fab 1 date        = 1979
 +
| fab 1 wafer.type  = Bulk
 +
| fab 1 wafer.size  =
 +
| fab 1 xtor.tech  = CMOS
 +
| fab 1 xtor.type  = Planar
 +
| fab 1 xtor.volt  = 5 V
 +
| fab 1 layers      = 1
 +
| fab 1 diff from  = [[3 µm]] Δ
 +
| fab 1 xtor.lg    = 2 µm
 +
| fab 1 xtor.lgΔ    = 0.80x
 +
| fab 1 xtor.cpp    = 5.6 µm
 +
| fab 1 xtor.cppΔ  =
 +
| fab 1 xtor.mmp    = 8 µm
 +
| fab 1 xtor.mmpΔ  =
 +
| fab 1 sram.hp    =
 +
| fab 1 sram.hpΔ    =
 +
| fab 1 sram.hd    = 1740 µm²
 +
| fab 1 sram.hdΔ    =
 +
| fab 1 sram.lv    =
 +
| fab 1 sram.lvΔ    =
 +
| fab 1 dram.edram  =  
 +
| fab 1 dram.edramΔ =
 +
 
 +
| fab 2 name link  = intel
 +
| fab 2 name        = Intel
 +
| fab 2 proc name  = P414.1 (HMOS-II)
 +
| fab 2 date        = 1980
 +
| fab 2 wafer.type  = Bulk
 +
| fab 2 wafer.size  =
 +
| fab 2 xtor.tech  =
 +
| fab 2 xtor.type  = Planar
 +
| fab 2 xtor.volt  = 5 V
 +
| fab 2 layers      =
 +
| fab 2 diff from  =
 +
| fab 2 xtor.lg    =
 +
| fab 2 xtor.lgΔ    =
 +
| fab 2 xtor.cpp    =
 +
| fab 2 xtor.cppΔ  =
 +
| fab 2 xtor.mmp    =
 +
| fab 2 xtor.mmpΔ  =
 +
| fab 2 sram.hp    =
 +
| fab 2 sram.hpΔ    =
 +
| fab 2 sram.hd    =
 +
| fab 2 sram.hdΔ    =
 +
| fab 2 sram.lv    =  
 +
  | fab 2 sram.lvΔ    =
 +
  | fab 2 dram.edram  =
 +
  | fab 2 dram.edramΔ =
 +
 
 +
  | fab 3 name link  = intel
 +
| fab 3 name        = Intel
 +
| fab 3 proc name  = P421.X (HMOS-E)
 +
  | fab 3 date        = 1980
 +
| fab 3 wafer.type  = Bulk
 +
| fab 3 wafer.size  =
 +
| fab 3 xtor.tech  = pMOS
 +
| fab 3 xtor.type  = Planar
 +
| fab 3 xtor.volt  = 5 V
 +
| fab 3 layers      =
 +
| fab 3 diff from  = @
 +
| fab 3 xtor.lg    =
 +
| fab 3 xtor.lgΔ    =
 +
| fab 3 xtor.cpp    =
 +
| fab 3 xtor.cppΔ  =
 +
| fab 3 xtor.mmp    =
 +
| fab 3 xtor.mmpΔ  =
 +
| fab 3 sram.hp    =
 +
| fab 3 sram.hpΔ    =
 +
| fab 3 sram.hd    =
 +
| fab 3 sram.hdΔ    =
 +
| fab 3 sram.lv    =
 +
| fab 3 sram.lvΔ    =
 +
| fab 3 dram.edram  =
 +
| fab 3 dram.edramΔ =
 +
 
 +
| fab 4 name link  = amd
 +
| fab 4 name        = AMD
 +
| fab 4 proc name  =
 +
| fab 4 date        =
 +
| fab 4 wafer.type  = Bulk
 +
| fab 4 wafer.size  =
 +
| fab 4 xtor.tech  =
 +
| fab 4 xtor.type  =
 +
| fab 4 xtor.volt  =
 +
| fab 4 layers      =
 +
| fab 4 diff from  = @
 +
| fab 4 xtor.lg    =
 +
| fab 4 xtor.lgΔ    =
 +
| fab 4 xtor.cpp    =
 +
| fab 4 xtor.cppΔ  =
 +
| fab 4 xtor.mmp    =
 +
| fab 4 xtor.mmpΔ  =
 +
| fab 4 sram.hp    =
 +
| fab 4 sram.hpΔ    =
 +
| fab 4 sram.hd    =
 +
| fab 4 sram.hdΔ    =
 +
| fab 4 sram.lv    =
 +
| fab 4 sram.lvΔ    =
 +
| fab 4 dram.edram  =
 +
| fab 4 dram.edramΔ =
 +
 
 +
| fab 5 name link  = motorola
 +
| fab 5 name        = Motorola
 +
| fab 5 proc name  =
 +
| fab 5 date        =
 +
| fab 5 wafer.type  = Bulk
 +
| fab 5 wafer.size  =
 +
| fab 5 xtor.tech  =
 +
| fab 5 xtor.type  =
 +
| fab 5 xtor.volt  =
 +
| fab 5 layers      =
 +
| fab 5 diff from  = @
 +
| fab 5 xtor.lg    =
 +
| fab 5 xtor.lgΔ    =
 +
| fab 5 xtor.cpp    =
 +
| fab 5 xtor.cppΔ  =
 +
| fab 5 xtor.mmp    =
 +
| fab 5 xtor.mmpΔ  =
 +
| fab 5 sram.hp    =
 +
| fab 5 sram.hpΔ    =
 +
| fab 5 sram.hd    =
 +
| fab 5 sram.hdΔ    =
 +
| fab 5 sram.lv    =
 +
| fab 5 sram.lvΔ    =
 +
| fab 5 dram.edram  =
 +
| fab 5 dram.edramΔ =
 +
 
 +
| fab 6 name link  = stmicroelectronics
 +
| fab 6 name        = STMicro
 +
| fab 6 proc name  =
 +
| fab 6 date        = 1992
 +
| fab 6 wafer.type  =
 +
| fab 6 wafer.size  =
 +
| fab 6 xtor.tech  =
 +
| fab 6 xtor.type  =
 +
| fab 6 xtor.volt  =
 +
| fab 6 layers      =
 +
| fab 6 diff from  = @
 +
| fab 6 xtor.lg    =
 +
| fab 6 xtor.lgΔ    =
 +
| fab 6 xtor.cpp    =
 +
| fab 6 xtor.cppΔ  =
 +
| fab 6 xtor.mmp    =
 +
| fab 6 xtor.mmpΔ  =
 +
| fab 6 sram.hp    =
 +
| fab 6 sram.hpΔ    =
 +
| fab 6 sram.hd    =
 +
| fab 6 sram.hdΔ    =
 +
| fab 6 sram.lv    =
 +
| fab 6 sram.lvΔ    =
 +
| fab 6 dram.edram  =
 +
| fab 6 dram.edramΔ =
 +
 
 +
| fab 7 name link  = toshiba
 +
| fab 7 name        = Toshiba
 +
| fab 7 proc name  =
 +
| fab 7 date        =
 +
| fab 7 wafer.type  = Bulk
 +
| fab 7 wafer.size  =
 +
| fab 7 xtor.tech  =
 +
| fab 7 xtor.type  =
 +
| fab 7 xtor.volt  =
 +
| fab 7 layers      =
 +
| fab 7 diff from  = @
 +
| fab 7 xtor.lg    =
 +
| fab 7 xtor.lgΔ    =
 +
| fab 7 xtor.cpp    =
 +
| fab 7 xtor.cppΔ  =
 +
| fab 7 xtor.mmp    =
 +
| fab 7 xtor.mmpΔ  =
 +
| fab 7 sram.hp    =
 +
| fab 7 sram.hpΔ    =
 +
| fab 7 sram.hd    =
 +
| fab 7 sram.hdΔ    =
 +
| fab 7 sram.lv    =
 +
| fab 7 sram.lvΔ    =
 +
| fab 7 dram.edram  =
 +
| fab 7 dram.edramΔ =
 +
 
 +
| fab 8 name link  = ti
 +
| fab 8 name        = TI
 +
| fab 8 proc name  =
 +
| fab 8 date        =
 +
| fab 8 wafer.type  = Bulk
 +
| fab 8 wafer.size  =
 +
| fab 8 xtor.tech  =
 +
| fab 8 xtor.type  =
 +
| fab 8 xtor.volt  =
 +
| fab 8 layers      =
 +
| fab 8 diff from  = @
 +
| fab 8 xtor.lg    =
 +
| fab 8 xtor.lgΔ    =
 +
| fab 8 xtor.cpp    =
 +
| fab 8 xtor.cppΔ  =
 +
| fab 8 xtor.mmp    =
 +
| fab 8 xtor.mmpΔ  =
 +
| fab 8 sram.hp    =
 +
| fab 8 sram.hpΔ    =
 +
| fab 8 sram.hd    =
 +
| fab 8 sram.hdΔ    =
 +
| fab 8 sram.lv    =
 +
| fab 8 sram.lvΔ    =
 +
| fab 8 dram.edram  =
 +
| fab 8 dram.edramΔ =
 +
 
 +
| fab 9 name link  = hitachi
 +
| fab 9 name        = Hitachi
 +
| fab 9 proc name  = Hi-CMOS II
 +
| fab 9 date        = 1982
 +
| fab 9 wafer.type  = Bulk
 +
| fab 9 wafer.size  =
 +
| fab 9 xtor.tech  =
 +
| fab 9 xtor.type  =
 +
| fab 9 xtor.volt  = 5 V
 +
| fab 9 layers      =
 +
| fab 9 diff from  = [[3 µm]]
 +
| fab 9 xtor.lg    = 2 µm
 +
| fab 9 xtor.lgΔ    = 0.67x
 +
| fab 9 xtor.cpp    =
 +
| fab 9 xtor.cppΔ  =
 +
| fab 9 xtor.mmp    = 3 µm
 +
| fab 9 xtor.mmpΔ  = 1.00x
 +
| fab 9 sram.hp    =
 +
| fab 9 sram.hpΔ    =
 +
| fab 9 sram.hd    = 303.8 µm²
 +
| fab 9 sram.hdΔ    = 0.34x
 +
| fab 9 sram.lv    =
 +
| fab 9 sram.lvΔ    =
 +
| fab 9 dram.edram  =
 +
| fab 9 dram.edramΔ =
 +
 
 +
| fab 10 name link  = vlsi technology
 +
| fab 10 name        = VLSI Technology
 +
| fab 10 proc name  =
 +
| fab 10 date        =
 +
| fab 10 wafer.type  = Bulk
 +
| fab 10 wafer.size  =
 +
| fab 10 xtor.tech  =
 +
| fab 10 xtor.type  =
 +
| fab 10 xtor.volt  =
 +
| fab 10 layers      =
 +
| fab 10 diff from  =
 +
| fab 10 xtor.lg    =
 +
| fab 10 xtor.lgΔ    =
 +
| fab 10 xtor.cpp    =
 +
| fab 10 xtor.cppΔ  =
 +
| fab 10 xtor.mmp    =
 +
| fab 10 xtor.mmpΔ  =
 +
| fab 10 sram.hp    =
 +
| fab 10 sram.hpΔ    =
 +
| fab 10 sram.hd    =
 +
| fab 10 sram.hdΔ    =
 +
| fab 10 sram.lv    =
 +
| fab 10 sram.lvΔ    =
 +
| fab 10 dram.edram  =
 +
| fab 10 dram.edramΔ =
 +
 
 +
| fab 11 name link  = sanyo
 +
| fab 11 name        = Sanyo
 +
| fab 11 proc name  =
 +
| fab 11 date        =
 +
| fab 11 wafer.type  = Bulk
 +
| fab 11 wafer.size  =
 +
| fab 11 xtor.tech  =
 +
| fab 11 xtor.type  =
 +
| fab 11 xtor.volt  =
 +
| fab 11 layers      =
 +
| fab 11 diff from  =
 +
| fab 11 xtor.lg    =
 +
| fab 11 xtor.lgΔ    =
 +
| fab 11 xtor.cpp    =
 +
| fab 11 xtor.cppΔ  =
 +
| fab 11 xtor.mmp    =
 +
| fab 11 xtor.mmpΔ  =
 +
| fab 11 sram.hp    =
 +
| fab 11 sram.hpΔ    =
 +
| fab 11 sram.hd    =
 +
| fab 11 sram.hdΔ    =
 +
| fab 11 sram.lv    =
 +
| fab 11 sram.lvΔ    =
 +
| fab 11 dram.edram  =
 +
| fab 11 dram.edramΔ =
 
}}
 
}}
{{scrolling table/mid}}
 
|-
 
! [[Intel]] || [[Intel]] || [[Toshiba]] || [[STMicro]] || [[Motorola]] || [[TI]] || [[AMD]] || [[Hitachi]]
 
|- style="text-align: center;"
 
| P414.1 (HMOS-II) || P421.X (HMOS-E) || || BCD-Offline || || || || Hi-CMOS II
 
|- style="text-align: center;"
 
| 1980 || 1980 || 1986 || 1992 || || || ||
 
|-
 
| ? µm || ? µm || ? µm || ? µm || ? µm || ? µm || ? µm || 2 µm
 
|-
 
| ? µm || ? µm || ? µm || ? µm || ? µm || ? µm || ? µm || 3 µm
 
|-
 
| ? µm² ||  ? µm² ||  ? µm² ||  ? µm² || ? µm² || ? µm² || ? µm²
 
{{scrolling table/end}}
 
  
 
== Microprocessors ==
 
== Microprocessors ==
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** {{amd|Am29100}}
 
** {{amd|Am29100}}
 
** {{amd|Am29500}}
 
** {{amd|Am29500}}
 +
* Intel
 +
** [[/Intel/8031AH|8031AH]]
 +
** [[/Intel/8031AH|8033AH]]
 +
** [[/Intel/8031AH|8051AH]]
 +
** [[/Intel/8031AH|8052AH]]
 
{{expand list}}
 
{{expand list}}
 +
 +
== Microarchitectures ==
 +
* ARM
 +
** {{armh|ARM2|l=arch}}
  
 
== References ==
 
== References ==
 +
* Minato, O., et al. "A Hi-CMOSII 8Kx8 bit static RAM." IEEE Journal of Solid-State Circuits 17.5 (1982): 793-798.
 
* Meguro, S., et al. "Hi-CMOS III technology." Electron Devices Meeting, 1984 International. IEEE, 1984.
 
* Meguro, S., et al. "Hi-CMOS III technology." Electron Devices Meeting, 1984 International. IEEE, 1984.
  
[[Category:Lithography]]
+
[[category:lithography]]

Latest revision as of 12:31, 22 February 2019

The 2 µm lithography process was the semiconductor process technology used by the some semiconductor companies in the mid to late 1980s. By the mid 80s this process was replaced by 1.5 µm, 1.3 µm, and 1.2 µm processes.

Industry[edit]

Foundry
Process Name
1st Production
WaferType
Size
TransistorTechnology
Type
Voltage
Metal Layers
 
Gate Length (Lg)
Contacted Gate Pitch (CPP)
Minimum Metal Pitch (MMP)
SRAM bitcellHigh-Perf (HP)
High-Density (HD)
Low-Voltage (LV)
DRAM bitcelleDRAM
IntelIntelIntelAMDMotorolaSTMicroToshibaTIHitachiVLSI TechnologySanyo
CHMOS IIP414.1 (HMOS-II)P421.X (HMOS-E)     Hi-CMOS II  
19791980198019921982
BulkBulkBulkBulkBulkBulkBulkBulkBulkBulk
           
CMOSpMOS
PlanarPlanarPlanar
5 V5 V5 V5 V
1
Value3 µm ΔValueValueN/AValueN/AValueN/AValueN/AValueN/AValueN/AValue3 µmValueValue
2 µm0.80x2 µm0.67x
5.6 µm               
8 µm         3 µm1.00x    
                
1740 µm²         303.8 µm²0.34x    
                
                

Microprocessors[edit]

This list is incomplete; you can help by expanding it.

Microarchitectures[edit]

References[edit]

  • Minato, O., et al. "A Hi-CMOSII 8Kx8 bit static RAM." IEEE Journal of Solid-State Circuits 17.5 (1982): 793-798.
  • Meguro, S., et al. "Hi-CMOS III technology." Electron Devices Meeting, 1984 International. IEEE, 1984.