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Difference between revisions of "24-bit architecture"

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{{Architecture sizes}}
 
{{Architecture sizes}}
The '''24-bit''' [[architecture]] is a [[microprocessor]] architecture that has a [[datapath]] width or a highest [[operand]] width of 24 bits or 3 [[octet]]s. These architectures typically have a matching [[register file]] with [[registers]] width of 24 bits.
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The '''24-bit [[architecture]]''' is a [[microprocessor]] or [[computer]] architecture that has a [[datapath]] width or a highest [[operand]] width of 24 bits or 3 [[octet]]s. These architectures typically have a matching [[register file]] with [[registers]] width of 24 bits.
  
 
== 24-bit digital signal processors ==
 
== 24-bit digital signal processors ==
 
* {{motorola|56000|56K Family}}
 
* {{motorola|56000|56K Family}}
  
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== 24-bit systems ==
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* {{harris|500|Harris 500}}
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* {{decc|PDP-2}}
  
 
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[[Category:24-bit microprocessors]]
 
[[Category:24-bit microprocessors]]

Latest revision as of 11:06, 28 May 2017

Architecture word sizes
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The 24-bit architecture is a microprocessor or computer architecture that has a datapath width or a highest operand width of 24 bits or 3 octets. These architectures typically have a matching register file with registers width of 24 bits.

24-bit digital signal processors[edit]

24-bit systems[edit]

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