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Difference between revisions of "16 nm lithography process"

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| 70 nm || 1.09x
 
| 70 nm || 1.09x
 
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| 0.07 µm<sup>2</sup> || 0.55x
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| 0.07 µm²<ref name="tsmc">Chen, Yen-Huei, et al. "A 16 nm 128 Mb SRAM in High-κ Metal-Gate FinFET Technology With Write-Assist Circuitry for Low-VMIN Applications." IEEE Journal of Solid-State Circuits 50.1 (2015): 170-177.</ref> || 0.55x
 
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=== TSMC ===
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TSMC demonstrated their 256 Mebibit [[SRAM]] wafer from their 7nm HKMG FinFET process. Their chip makes use of 34% of the area of their [[16 nm process]] demo chip counterpart.
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{| class="collapsible collapsed wikitable"
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|-
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! colspan="2" | TSMC 256Mb SRAM demo wafer<ref name="tsmc" />
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|-
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|
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<table class="wikitable">
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<tr><th>Technology</th><td>16 nm HK-MG FinFET</td></tr>
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<tr><th>Metal scheme</th><td>1P7M</td></tr>
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<tr><th>Supply voltage</th><td>0.85 V (core)<br>1.8 V (i/o)</td></tr>
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<tr><th>Bit cell size</th><td>0.07 µm²</td></tr>
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<tr><th>macro configs</th><td>4096x32 MUX16<br>258 bits/BL<br>272 bits/WL</td></tr>
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<tr><th>Capacity</th><td>256 Mib</td></tr>
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<tr><th>Test Features</th><td>Row/Column Redundancy<br>Programmable E-fuse</td></tr>
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<tr><th>Die Size</th><td>42.6 mm²</td></tr>
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</table>
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| [[File:tsmc 16nm SRAM block.png|400px]]
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|}
  
 
== 16 nm Microprocessors==
 
== 16 nm Microprocessors==

Revision as of 18:08, 10 March 2017

The 16 nanometer (16 nm) lithography process is a full node semiconductor manufacturing process following the 20 nm process stopgap. Commercial integrated circuit manufacturing using 16 nm process began in 2014. The term "16 nm" is simply a commercial name for a generation of a certain size and its technology, as opposed to gate length or half pitch. This technology is set to be replaced with 10 nm process in 2017.

Industry

Fab
Wafer​
 ​
Fin Pitch​
Fin Width​
Fin Height​
Contacted Gate Pitch​
Interconnect Pitch (M1P)​
SRAM bit cell
TSMC
300mm
Value[1] 20 nm Δ
48 nm N/A
 ? nm
37 nm
90 nm 1.03x
70 nm 1.09x
0.07 µm²[2] 0.55x

TSMC

TSMC demonstrated their 256 Mebibit SRAM wafer from their 7nm HKMG FinFET process. Their chip makes use of 34% of the area of their 16 nm process demo chip counterpart.

16 nm Microprocessors

This list is incomplete; you can help by expanding it.

16 nm Microarchitectures

This list is incomplete; you can help by expanding it.

References

  1. TechInsights/Chipworks, Kevin Gibb, The ConFab 2016
  2. 2.0 2.1 Chen, Yen-Huei, et al. "A 16 nm 128 Mb SRAM in High-κ Metal-Gate FinFET Technology With Write-Assist Circuitry for Low-VMIN Applications." IEEE Journal of Solid-State Circuits 50.1 (2015): 170-177.