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Difference between revisions of "12-bit architecture"

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{{Architecture sizes}}
 
{{Architecture sizes}}
The '''12-bit''' [[computer architecture]] is a [[microprocessor]] architecture that has a [[datapath]] width or a highest [[operand]] width of 12 bits or 1.5 [[octet]]s. These architectures typically have a matching [[register file]] with [[registers]] width of 12 bits.
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The '''12-bit [[architecture]]''' is a [[microprocessor]] or [[computer]] architecture that has a [[datapath]] width or a highest [[operand]] width of 12 bits or 1.5 [[octet]]s. These architectures typically have a matching [[register file]] with [[registers]] width of 12 bits.
  
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== 12-bit microprocessors ==
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* [[Intersil IM6100]]
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* [[Harris HD-6120]]
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* {{toshiba|TLCS-12}}
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== 12-bit systems ==
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* {{cdc|160|CDC 160}}
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* {{cdc|6600|CDC 6600}}
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* {{decc|DECmate|DEC DECmate}}
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* {{decc|LINC|DEC LINC}}
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* {{decc|LINC-8|DEC LINC-8}}
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* {{decc|PDP-5|DEC PDP-5}}
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* {{decc|PDP-8|DEC PDP-8}}
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* {{decc|PDP-12|DEC PDP-12}}
  
== 12-bit microprocessors ==
 
* [[Intersil 6100]]
 
* [[Toshiba TLCS-12]]
 
  
 
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[[Category:12-bit microprocessors]]
 
[[Category:12-bit microprocessors]]

Latest revision as of 14:36, 7 October 2016

Architecture word sizes
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The 12-bit architecture is a microprocessor or computer architecture that has a datapath width or a highest operand width of 12 bits or 1.5 octets. These architectures typically have a matching register file with registers width of 12 bits.

12-bit microprocessors[edit]

12-bit systems[edit]


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