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Difference between revisions of "1.3 µm lithography process"

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  |Process Name
 
  |Process Name
 
  |1st Production
 
  |1st Production
 +
|Voltage
 
  | 
 
  | 
  |Contacted Gate Pitch
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  |Gate Length
 
  |Interconnect Pitch (M1P)
 
  |Interconnect Pitch (M1P)
 
  |SRAM bit cell
 
  |SRAM bit cell
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{{scrolling table/mid}}
 
{{scrolling table/mid}}
 
|-
 
|-
! [[Motorola]] !! [[Hitachi]] !! [[Fujitsu]]
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! [[Motorola]] !! colspan="2" | [[Hitachi]] !! [[Fujitsu]]
 
|- style="text-align: center;"
 
|- style="text-align: center;"
|  || ||  
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|  || colspan="2" | Hi-CMOS III ||  
 
|- style="text-align: center;"
 
|- style="text-align: center;"
| 1987 || 1987 ||
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| 1987 || colspan="2" | 1987 ||
 
|-
 
|-
! Value !! Value !! Value
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| || colspan="2" | 5 V ||
 
|-
 
|-
| ? nm  || ? nm  || ? nm
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! Value !! Value !! [[2 µm]] Δ !! Value
 
|-
 
|-
| ? nm  || ? nm  || ? nm  
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| ? nm  || 1.2 µm || 0.60x || ? nm  
 
|-
 
|-
| ? µm<sup>2</sup> || ? µm<sup>2</sup>  ||  ? µm<sup>2</sup>
+
| ? nm  || 1.3 µm || 0.43x || nm
 +
|-
 +
| ? µm² || ? µm² || ||  ? µm²
 
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== 1.3 µm Microprocessors ==
 
== 1.3 µm Microprocessors ==
 
* Motorola
 
* Motorola
** {{motorola|68030}}
+
** {{motorola|68030}}, "Micro 32"
 
* Sun
 
* Sun
 
** {{sun|MB86900}}
 
** {{sun|MB86900}}
 +
{{expand list}}
 +
 +
== References==
 +
* Meguro, S., et al. "Hi-CMOS III technology." Electron Devices Meeting, 1984 International. IEEE, 1984.
  
 
[[Category:Lithography]]
 
[[Category:Lithography]]

Revision as of 09:35, 7 April 2017

The 1.2 µm lithography process was the semiconductor process technology used by the major semiconductor companies between in the late 1980s. 1 µm was phased out in the early 1990s and was replaced by 1 µm, 800 nm, and 650 nm processes.

Industry

Fab
Process Name​
1st Production​
Voltage​
 ​
Gate Length​
Interconnect Pitch (M1P)​
SRAM bit cell
Motorola Hitachi Fujitsu
Hi-CMOS III  
1987 1987
5 V
Value Value 2 µm Δ Value
 ? nm 1.2 µm 0.60x  ? nm
 ? nm 1.3 µm 0.43x nm
 ? µm²  ? µm²  ? µm²

1.3 µm Microprocessors

This list is incomplete; you can help by expanding it.

References

  • Meguro, S., et al. "Hi-CMOS III technology." Electron Devices Meeting, 1984 International. IEEE, 1984.