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Difference between revisions of "1.2 µm lithography process"

(Industry)
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  |Process Name
 
  |Process Name
 
  |1st Production
 
  |1st Production
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|Voltage
 
  | 
 
  | 
 
  |Contacted Gate Pitch
 
  |Contacted Gate Pitch
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|-
 
|-
! [[Intel]] !! [[NEC]]
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! [[Intel]] !! [[NEC]] !! [[Hitachi]]
 
|- style="text-align: center;"
 
|- style="text-align: center;"
|  ||  
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|  ||   || Hi-CMOS III
 
|- style="text-align: center;"
 
|- style="text-align: center;"
| 1987 || 1988
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| 1987 || 1988 ||
 +
|- style="text-align: center;"
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|  ||  || 5 V
 
|-
 
|-
! Value !! Value
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! Value !! Value !! Value
 
|-
 
|-
| ? nm || ? nm
+
| ? µm || ? µm || 1.2 µm
 
|-
 
|-
| ? nm || ? nm
+
| ? µm || ? µm || 1.3 µm
 
|-
 
|-
| ? µm² ||  ? µm²  
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| ? µm² ||  ? µm² ||  ? µm²  
 
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Revision as of 05:59, 4 April 2017

The 1.2 µm lithography process was the semiconductor process technology used by the major semiconductor companies between in the late 1980s. 1 µm was phased out in the early 1990s and was replaced by 1 µm, 800 nm, and 650 nm processes.

Industry

Fab
Process Name​
1st Production​
Voltage​
 ​
Contacted Gate Pitch​
Interconnect Pitch (M1P)​
SRAM bit cell
Intel NEC Hitachi
  Hi-CMOS III
1987 1988
5 V
Value Value Value
 ? µm  ? µm 1.2 µm
 ? µm  ? µm 1.3 µm
 ? µm²  ? µm²  ? µm²

1.2 µm Microprocessors

This list is incomplete; you can help by expanding it.

References

  • Meguro, S., et al. "Hi-CMOS III technology." Electron Devices Meeting, 1984 International. IEEE, 1984.