Edit Values

General Info

Microarchitecture

Xeon Gold 6248 is a 64-bit 20-core x86 high performance server microprocessor introduced by Intel in early 2019. The Gold 6248 is based on the Cascade Lake microarchitecture and is manufactured on a 14 nm process. This chip supports 4-way multiprocessing, sports 2 AVX-512 FMA units as well as three Ultra Path Interconnect links. This microprocessor supports up 1 TiB of hexa-channel DDR4-2933 memory, operates at 2.5 GHz with a TDP of 150 W and features a turbo boost frequency of up to 3.9 GHz.

Cache

Main article: Cascade Lake § Cache

[Edit/Modify Cache Info]

Cache Organization Cache is a hardware component containing a relatively small and extremely fast memory designed to speed up the performance of a CPU by preparing ahead of time the data it needs to read from a relatively slower medium such as main memory. The organization and amount of cache can have a large impact on the performance, power consumption, die size, and consequently cost of the IC. Cache is specified by its size, number of sets, associativity, block size, sub-block size, and fetch and write-back policies. Note: All units are in kibibytes and mebibytes.

L1$ 1.25 MiB 1,280 KiB 1,310,720 B L1I$ 640 KiB 655,360 B 0.625 MiB 20x32 KiB 8-way set associative   L1D$ 640 KiB 655,360 B 0.625 MiB 20x32 KiB 8-way set associative write-back L2$ 20 MiB 20,480 KiB 20,971,520 B 0.0195 GiB     20x1 MiB 16-way set associative write-back L3$ 27.5 MiB 28,160 KiB 28,835,840 B 0.0269 GiB     20x1.375 MiB 11-way set associative write-back