Cavium OCTEON | |
CN38xx | |
Developer | Cavium |
Manufacturer | TSMC |
Type | System on chips |
Introduction | September 13, 2004 (announced) June 1, 2005 (launch) |
Architecture | MIPS64 R2 network SoCs |
ISA | MIPS64 |
µarch | cnMIPS |
Word size | 64 bit 8 octets
16 nibbles |
Process | 130 nm 0.13 μm
1.3e-4 mm |
Technology | CMOS |
Clock | 400 MHz-600 MHz |
Package | FCBGA-1521, HSBGA-868 |
Socket | BGA-1521, BGA-868 |
Succession | |
→ | |
OCTEON II |
OCTEON was a family of 64-bit multi-core MIPS microprocessors designed by Cavium for networking devices.
Overview
The original OCTEON family of network-oriented microprocessors were announced in September of 2004. These chips are based on Cavium's newly announced microarchitecture, cnMIPS, announced the same day. The cnMIPS design is a fully compliant MIPS64 revision 2 implementation. OCTEON chips are found in many enterprise an data center network servers, routers, and switches as well as various high-end residential routers.
Architecture
- Main article: cnMIPS µarch
The cnMIPS microarchitecture is a fully-custom design implementing the MIPS64 revision 2 ISA on TSMC's 130 nm process. Due to the specific nature of the applicatons running, an FPU was omitted. Instead, Cavium opted to incorporate a wide array of hardware accelerators for network applications (L3 to L7) including support for compression/decompression algorithms (e.g.GZIP), and security/crypto algorithms (e.g. DES, AES, MD5, and SHA1).
Members
CN3000 Series
CN3000-Series Microprocessors | |||||||
---|---|---|---|---|---|---|---|
Model | Price | Launched | Cores | Power | Freq | Max Mem | Features |
CN3005-300 CP | $ 19.00 € 17.10 £ 15.39 ¥ 1,963.27 | 1 May 2006 | 1 | 2 W 2,000 mW 0.00268 hp 0.002 kW | 300 MHz 0.3 GHz 300,000 kHz | 2,048 MiB 2,097,152 KiB 2,147,483,648 B 2 GiB 0.00195 TiB | |
CN3005-300 SCP | $ 19.00 € 17.10 £ 15.39 ¥ 1,963.27 | 1 May 2006 | 1 | 2 W 2,000 mW 0.00268 hp 0.002 kW | 300 MHz 0.3 GHz 300,000 kHz | 2,048 MiB 2,097,152 KiB 2,147,483,648 B 2 GiB 0.00195 TiB | |
CN3005-400 CP | 1 May 2006 | 1 | 3 W 3,000 mW 0.00402 hp 0.003 kW | 400 MHz 0.4 GHz 400,000 kHz | 2,048 MiB 2,097,152 KiB 2,147,483,648 B 2 GiB 0.00195 TiB | ||
CN3005-400 SCP | 1 May 2006 | 1 | 3 W 3,000 mW 0.00402 hp 0.003 kW | 400 MHz 0.4 GHz 400,000 kHz | 2,048 MiB 2,097,152 KiB 2,147,483,648 B 2 GiB 0.00195 TiB | ||
CN3005-500 CP | 1 May 2006 | 1 | 4 W 4,000 mW 0.00536 hp 0.004 kW | 500 MHz 0.5 GHz 500,000 kHz | 2,048 MiB 2,097,152 KiB 2,147,483,648 B 2 GiB 0.00195 TiB | ||
CN3005-500 SCP | 1 May 2006 | 1 | 4 W 4,000 mW 0.00536 hp 0.004 kW | 500 MHz 0.5 GHz 500,000 kHz | 2,048 MiB 2,097,152 KiB 2,147,483,648 B 2 GiB 0.00195 TiB | ||
CN3010-300 CP | $ 39.00 € 35.10 £ 31.59 ¥ 4,029.87 | 1 May 2006 | 1 | 2 W 2,000 mW 0.00268 hp 0.002 kW | 300 MHz 0.3 GHz 300,000 kHz | 2,048 MiB 2,097,152 KiB 2,147,483,648 B 2 GiB 0.00195 TiB | |
CN3010-300 SCP | $ 39.00 € 35.10 £ 31.59 ¥ 4,029.87 | 1 May 2006 | 1 | 2 W 2,000 mW 0.00268 hp 0.002 kW | 300 MHz 0.3 GHz 300,000 kHz | 2,048 MiB 2,097,152 KiB 2,147,483,648 B 2 GiB 0.00195 TiB | |
CN3010-400 CP | 1 May 2006 | 1 | 3 W 3,000 mW 0.00402 hp 0.003 kW | 400 MHz 0.4 GHz 400,000 kHz | 2,048 MiB 2,097,152 KiB 2,147,483,648 B 2 GiB 0.00195 TiB | ||
CN3010-400 SCP | 1 May 2006 | 1 | 3 W 3,000 mW 0.00402 hp 0.003 kW | 400 MHz 0.4 GHz 400,000 kHz | 2,048 MiB 2,097,152 KiB 2,147,483,648 B 2 GiB 0.00195 TiB | ||
CN3010-500 CP | 1 May 2006 | 1 | 4 W 4,000 mW 0.00536 hp 0.004 kW | 500 MHz 0.5 GHz 500,000 kHz | 2,048 MiB 2,097,152 KiB 2,147,483,648 B 2 GiB 0.00195 TiB | ||
CN3010-500 SCP | 1 May 2006 | 1 | 4 W 4,000 mW 0.00536 hp 0.004 kW | 500 MHz 0.5 GHz 500,000 kHz | 2,048 MiB 2,097,152 KiB 2,147,483,648 B 2 GiB 0.00195 TiB | ||
Count: 12 |
Datasheet
designer | Cavium + |
first announced | September 13, 2004 + |
first launched | June 1, 2005 + |
full page name | cavium/octeon + |
instance of | system on a chip family + |
instruction set architecture | MIPS64 + |
main designer | Cavium + |
manufacturer | TSMC + |
microarchitecture | cnMIPS + |
name | Cavium OCTEON + |
package | FCBGA-1521 + and HSBGA-868 + |
process | 130 nm (0.13 μm, 1.3e-4 mm) + |
socket | BGA-1521 + and BGA-868 + |
technology | CMOS + |
word size | 64 bit (8 octets, 16 nibbles) + |