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- | socket = | socket type =4 KB (449 words) - 16:15, 13 December 2017
- | socket = | socket type =4 KB (467 words) - 16:15, 13 December 2017
- | socket = | socket type =4 KB (418 words) - 16:15, 13 December 2017
- | socket = | socket type =4 KB (412 words) - 16:15, 13 December 2017
- | microarch 5 = Ivy Bridge | proc 5 = 22 nm20 KB (2,661 words) - 00:45, 11 October 2017
- | microarch 5 = Nehalem | proc 5 = 45 nm25 KB (3,201 words) - 03:13, 22 September 2018
- |tdp=6.5 W |socket=BGA11704 KB (529 words) - 17:41, 27 March 2018
- |socket=BGA1170 |socket type=BGA5 KB (701 words) - 17:40, 27 March 2018
- |socket=BGA1170 |socket type=BGA4 KB (540 words) - 17:40, 27 March 2018
- |socket=BGA1170 |socket type=BGA4 KB (544 words) - 17:43, 27 March 2018
- |socket=BGA1170 |socket type=BGA4 KB (580 words) - 09:40, 8 July 2022
- |socket=BGA1170 |socket type=BGA5 KB (724 words) - 06:10, 2 December 2018
- |socket=BGA1170 |socket type=BGA4 KB (539 words) - 17:39, 27 March 2018
- |socket=BGA1170 |socket type=BGA4 KB (535 words) - 17:39, 27 March 2018
- |socket=BGA1170 |socket type=BGA5 KB (722 words) - 01:50, 24 November 2018
- |socket=BGA1170 |socket type=BGA4 KB (533 words) - 17:41, 27 March 2018
- |socket=BGA1170 |socket type=BGA4 KB (539 words) - 17:39, 27 March 2018
- | microarch 5 = Haswell | socket = LGA13664 KB (572 words) - 16:03, 1 June 2017
- | first announced = February 5, 2010 | bus rate = 2.5 GT/s4 KB (537 words) - 15:01, 13 December 2019
- ** {{intel|Socket H}} (LGA-1156) → {{intel|Socket H2}} (LGA-1155) **** 5 cycles for complex addresses84 KB (13,075 words) - 00:54, 29 December 2020