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EPYC Embedded 3201 - AMD
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EPYC Embedded 3201
General Info
DesignerAMD
ManufacturerGlobalFoundries
Model Number3201
MarketServer, Embedded
IntroductionFebruary 21, 2018 (announced)
February 21, 2018 (launched)
ShopAmazon
General Specs
FamilyEPYC Embedded
Series3000
Frequency1,500 MHz
Turbo Frequency3,100 MHz (1 core)
Clock multiplier15
Microarchitecture
ISAx86-64 (x86)
MicroarchitectureZen
Core NameSnowy Owl
Process14 nm
Transistors4,800,000,000
TechnologyCMOS
Die213 mm²
Word Size64 bit
Cores8
Threads8
Max Memory512 GiB
Multiprocessing
Max SMP1-Way (Uniprocessor)
Electrical
TDP30 W
Tjunction0 °C – 95 °C
Packaging
Template:packages/amd/package sp4r2

EPYC Embedded 3201 is a 64-bit octa-core x86 embedded microprocessor introduced by AMD in early 2018 for dense servers and edge devices. Fabricated on a 14 nm process based on the Zen microarchitecture, this chip operates at 1.5 GHz with a TDP of 30 W and a turbo frequency of 3.1 GHz. The 3201 supports up to 512 GiB of dual-channel DDR4-2666 ECC memory.


DIL16 Blank.svg Preliminary Data! Information presented in this article deal with a microprocessor or chip that was recently announced or leaked, thus missing information regarding its features and exact specification. Information may be incomplete and can change by final release.


Cache

Main article: Zen § Cache

[Edit/Modify Cache Info]

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Cache Organization
Cache is a hardware component containing a relatively small and extremely fast memory designed to speed up the performance of a CPU by preparing ahead of time the data it needs to read from a relatively slower medium such as main memory.

The organization and amount of cache can have a large impact on the performance, power consumption, die size, and consequently cost of the IC.

Cache is specified by its size, number of sets, associativity, block size, sub-block size, and fetch and write-back policies.

Note: All units are in kibibytes and mebibytes.
L1$768 KiB
786,432 B
0.75 MiB
L1I$512 KiB
524,288 B
0.5 MiB
8x64 KiB4-way set associative 
L1D$256 KiB
262,144 B
0.25 MiB
8x32 KiB8-way set associativewrite-back

L2$4 MiB
4,096 KiB
4,194,304 B
0.00391 GiB
  8x512 KiB8-way set associativewrite-back

L3$16 MiB
16,384 KiB
16,777,216 B
0.0156 GiB
  2x8 MiB16-way set associativewrite-back

Memory controller

[Edit/Modify Memory Info]

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Integrated Memory Controller
Max TypeDDR4-2666
Supports ECCYes
Max Mem512 GiB
Controllers2
Channels2
Max Bandwidth31.79 GiB/s
32,552.96 MiB/s
34.134 GB/s
34,134.253 MB/s
0.031 TiB/s
0.0341 TB/s
Bandwidth
Single 15.89 GiB/s
Double 31.79 GiB/s

Expansions

The EPYC Embedded 3201 has 32 PCIe lanes that are MUX'ed with a number of other ports and can be reconfigured as either SATA ports (up to 8 such ports), or as GbE ports (up to 4 such ports), or any mixed configuration of those options.

[Edit/Modify Expansions Info]

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Expansion Options
PCIeRevision: 3.0
Max Lanes: 32
Configuration: x16, x8, x4, x2
SATARevision: 3.0
Max Ports: 8

[Edit/Modify Network Info]

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Networking
Ethernet
10GbEYes (Ports: 4)

Features

[Edit/Modify Supported Features]

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Supported x86 Extensions & Processor Features
MMXMMX Extension
EMMXExtended MMX Extension
SSEStreaming SIMD Extensions
SSE2Streaming SIMD Extensions 2
SSE3Streaming SIMD Extensions 3
SSSE3Supplemental SSE3
SSE4.1Streaming SIMD Extensions 4.1
SSE4.2Streaming SIMD Extensions 4.2
SSE4aStreaming SIMD Extensions 4a
AVXAdvanced Vector Extensions
AVX2Advanced Vector Extensions 2
ABMAdvanced Bit Manipulation
BMI1Bit Manipulation Instruction Set 1
BMI2Bit Manipulation Instruction Set 2
FMA33-Operand Fused-Multiply-Add
AESAES Encryption Instructions
RdRandHardware RNG
SHASHA Extensions
ADXMulti-Precision Add-Carry
CLMULCarry-less Multiplication Extension
F16C16-bit Floating Point Conversion
x86-1616-bit x86
x86-3232-bit x86
x86-6464-bit x86
RealReal Mode
ProtectedProtected Mode
SMMSystem Management Mode
FPUIntegrated x87 FPU
NXNo-eXecute
SMTSimultaneous Multithreading
AMD-ViAMD-Vi (I/O MMU virtualization)
AMD-VAMD Virtualization
SMESecure Memory Encryption
TSMETransparent SME
SEVSecure Encrypted Virtualization
SenseMISenseMI Technology
Has subobject
"Has subobject" is a predefined property representing a container construct and is provided by Semantic MediaWiki.
EPYC Embedded 3201 - AMD#pcie +
base frequency1,500 MHz (1.5 GHz, 1,500,000 kHz) +
clock multiplier15 +
core count8 +
core nameSnowy Owl +
designerAMD +
die area213 mm² (0.33 in², 2.13 cm², 213,000,000 µm²) +
familyEPYC Embedded +
first announcedFebruary 21, 2018 +
first launchedFebruary 21, 2018 +
full page nameamd/epyc embedded/3201 +
has ecc memory supporttrue +
instance ofmicroprocessor +
isax86-64 +
isa familyx86 +
l1$ size768 KiB (786,432 B, 0.75 MiB) +
l1d$ description8-way set associative +
l1d$ size256 KiB (262,144 B, 0.25 MiB) +
l1i$ description4-way set associative +
l1i$ size512 KiB (524,288 B, 0.5 MiB) +
l2$ description8-way set associative +
l2$ size4 MiB (4,096 KiB, 4,194,304 B, 0.00391 GiB) +
l3$ description16-way set associative +
l3$ size16 MiB (16,384 KiB, 16,777,216 B, 0.0156 GiB) +
ldateFebruary 21, 2018 +
manufacturerGlobalFoundries +
market segmentServer + and Embedded +
max cpu count1 +
max junction temperature368.15 K (95 °C, 203 °F, 662.67 °R) +
max memory524,288 MiB (536,870,912 KiB, 549,755,813,888 B, 512 GiB, 0.5 TiB) +
max memory bandwidth31.79 GiB/s (32,552.96 MiB/s, 34.134 GB/s, 34,134.253 MB/s, 0.031 TiB/s, 0.0341 TB/s) +
max memory channels2 +
max sata ports8 +
microarchitectureZen +
min junction temperature273.15 K (0 °C, 32 °F, 491.67 °R) +
model number3201 +
nameEPYC Embedded 3201 +
process14 nm (0.014 μm, 1.4e-5 mm) +
series3000 +
smp max ways1 +
supported memory typeDDR4-2666 +
tdp30 W (30,000 mW, 0.0402 hp, 0.03 kW) +
technologyCMOS +
thread count8 +
transistor count4,800,000,000 +
turbo frequency (1 core)3,100 MHz (3.1 GHz, 3,100,000 kHz) +
word size64 bit (8 octets, 16 nibbles) +