From WikiChip
Difference between revisions of "intel/xeon w/w-2150b"
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{{intel title|Xeon W-2150B}} | {{intel title|Xeon W-2150B}} | ||
{{chip | {{chip | ||
| − | |future= | + | |future=kpVh |
| + | |chip type=NwIc | ||
|name=Xeon W-2150B | |name=Xeon W-2150B | ||
| + | |no image=Ajdl | ||
|image=intel skylake w (front).png | |image=intel skylake w (front).png | ||
| + | |image size=CXSbKZcx | ||
| + | |image 2=uqXn | ||
| + | |image size=CXSbKZcx | ||
| + | |back image=rbDg | ||
| + | |back image size=Jpyv | ||
| + | |caption=Frox | ||
|designer=Intel | |designer=Intel | ||
|manufacturer=Intel | |manufacturer=Intel | ||
|model number=W-2150B | |model number=W-2150B | ||
| + | |part number=pEot | ||
| + | |part number 2=qjyM | ||
| + | |part number 4=brNj | ||
| + | |part number 6=mJBW | ||
| + | |part number 8=SJzq | ||
| + | |part number 10=bUdw | ||
| + | |s-spec=cbNn | ||
| + | |s-spec 2=HvwW | ||
| + | |s-spec 3=ZWOv | ||
| + | |s-spec 5=XjCE | ||
| + | |s-spec 6=jGMM | ||
| + | |s-spec 8=bsgi | ||
| + | |s-spec 9=rcEk | ||
| + | |s-spec 11=HZWe | ||
| + | |s-spec 12=fuZM | ||
| + | |s-spec qs=DdqO | ||
| + | |s-spec qs 2=rlKK | ||
| + | |s-spec qs 3=cAjK | ||
| + | |s-spec qs 5=kUEO | ||
| + | |s-spec qs 6=VZHW | ||
| + | |s-spec qs 8=MMEN | ||
| + | |s-spec qs 9=dhOq | ||
| + | |s-spec qs 11=Lign | ||
| + | |s-spec qs 12=ymTZ | ||
|market=Workstation | |market=Workstation | ||
|first announced=June 5, 2017 | |first announced=June 5, 2017 | ||
|first launched=December 21, 2017 | |first launched=December 21, 2017 | ||
| + | |last order=DEMU | ||
| + | |last shipment=NQEl | ||
| + | |release price=NTyu | ||
| + | |release price (tray)=PlQs | ||
| + | |release price (box)=VeAI | ||
|family=Xeon W | |family=Xeon W | ||
| + | |family 2=hLcv | ||
|series=W-2000 | |series=W-2000 | ||
| − | |locked= | + | |locked=crQO |
|frequency=3,000 MHz | |frequency=3,000 MHz | ||
| + | |frequency 2=bwBp | ||
| + | |frequency 4=YpXM | ||
| + | |frequency 6=wGrw | ||
| + | |frequency 8=paGU | ||
|turbo frequency1=4,500 MHz | |turbo frequency1=4,500 MHz | ||
|turbo frequency2=4,500 MHz | |turbo frequency2=4,500 MHz | ||
|turbo frequency3=4,300 MHz | |turbo frequency3=4,300 MHz | ||
| − | |||
|turbo frequency5=4,100 MHz | |turbo frequency5=4,100 MHz | ||
|turbo frequency6=4,100 MHz | |turbo frequency6=4,100 MHz | ||
| − | |||
|turbo frequency8=4,100 MHz | |turbo frequency8=4,100 MHz | ||
|turbo frequency9=3,800 MHz | |turbo frequency9=3,800 MHz | ||
| − | |turbo | + | |turbo frequency11=LquS |
| + | |turbo frequency12=ITOG | ||
| + | |turbo frequency14=Bytc | ||
| + | |turbo frequency15=YafF | ||
| + | |turbo frequency17=PzRf | ||
| + | |turbo frequency18=YojI | ||
| + | |turbo frequency20=ffDz | ||
| + | |turbo frequency21=FRWB | ||
| + | |turbo frequency23=RRhJ | ||
| + | |turbo frequency24=zFqq | ||
| + | |turbo frequency26=yKuP | ||
| + | |turbo frequency27=EGDC | ||
| + | |turbo frequency29=pRBy | ||
| + | |turbo frequency30=hyXR | ||
| + | |turbo frequency32=Xzlx | ||
| + | |turbo frequency=vUnd | ||
|bus type=DMI 3.0 | |bus type=DMI 3.0 | ||
| + | |bus speed=xxnv | ||
|bus links=4 | |bus links=4 | ||
|bus rate=8 GT/s | |bus rate=8 GT/s | ||
|clock multiplier=30 | |clock multiplier=30 | ||
| + | |cpuid=xOoQ | ||
| + | |cpuid 2=FmBz | ||
| + | |cpuid 3=gHGB | ||
|isa=x86-64 | |isa=x86-64 | ||
| − | |||
|microarch=Skylake (server) | |microarch=Skylake (server) | ||
| + | |microarch 2=bygc | ||
| + | |microarch 4=eIsH | ||
|platform=Basin Falls | |platform=Basin Falls | ||
| + | |chipset=FFfU | ||
| + | |chipset 2=BVLj | ||
| + | |chipset 4=lOwe | ||
|core name=Skylake W | |core name=Skylake W | ||
| + | |core name 2=dgeX | ||
| + | |core name 4=Hbqf | ||
|core family=6 | |core family=6 | ||
| + | |core family 2=bWeV | ||
| + | |core family 4=wCTw | ||
| + | |core model=CUoC | ||
| + | |core model 2=pQDz | ||
| + | |core model 4=wDDK | ||
|core stepping=U0 | |core stepping=U0 | ||
| + | |core stepping 2=fQLH | ||
| + | |core stepping 4=tHXv | ||
|process=14 nm | |process=14 nm | ||
| + | |process 2=rycs | ||
| + | |process 4=lIBI | ||
| + | |transistors=EiHY | ||
|technology=CMOS | |technology=CMOS | ||
| + | |die area=CXka | ||
| + | |die width=kKIK | ||
| + | |mcp=qgrV | ||
|word size=64 bit | |word size=64 bit | ||
|core count=10 | |core count=10 | ||
|thread count=20 | |thread count=20 | ||
|max memory=512 GiB | |max memory=512 GiB | ||
| + | |max memory addr=pyjF | ||
|max cpus=1 | |max cpus=1 | ||
| − | |package name | + | |smp interconnect=wCCQ |
| + | |smp interconnect links=DZlW | ||
| + | |smp interconnect rate=kRoD | ||
| + | |power=MbBx | ||
| + | |average power=HuDI | ||
| + | |idle power=KyzP | ||
| + | |v core=sEVK | ||
| + | |v core tolerance=yjDZ | ||
| + | |v core min=ffCE | ||
| + | |v core max=unsi | ||
| + | |v io=Lapn | ||
| + | |v io tolerance=ylNg | ||
| + | |v io 3=baCC | ||
| + | |v io 5=wIzk | ||
| + | |sdp=Ysbp | ||
| + | |tdp=GAEz | ||
| + | |tdp 2=VsUK | ||
| + | |tdp 4=lZmO | ||
| + | |tdp typical=EojP | ||
| + | |ctdp down=SPIZ | ||
| + | |ctdp down frequency=VBrU | ||
| + | |ctdp up=ezNP | ||
| + | |ctdp up frequency=WkKt | ||
| + | |temp min=chAo | ||
| + | |temp max=Fjxl | ||
| + | |tjunc min=pRbF | ||
| + | |tjunc max=tvyP | ||
| + | |tcase min=YfiB | ||
| + | |tcase max=qKWG | ||
| + | |tstorage min=daaY | ||
| + | |tstorage max=PnFG | ||
| + | |tambient min=POtl | ||
| + | |tambient max=RXqr | ||
| + | |dts min=fYRz | ||
| + | |dts max=cMLv | ||
| + | |package module 1=wViU | ||
| + | |package name=Lgom | ||
| + | |predecessor=PrvX | ||
| + | |successor=aDZP | ||
| + | |contemporary=pipL | ||
| + | |neuron count=kTsq | ||
| + | |synapse count=hxyt | ||
}} | }} | ||
'''W-2150B''' is a {{arch|64}} [[deca-core]] [[x86]] enterprise performance workstation microprocessor introduced by [[Intel]] in [[2017]]. | '''W-2150B''' is a {{arch|64}} [[deca-core]] [[x86]] enterprise performance workstation microprocessor introduced by [[Intel]] in [[2017]]. | ||
Revision as of 07:57, 18 July 2025
| Edit Values | |
| Xeon W-2150B | |
![]() | |
| Frox | |
| 200px | |
| General Info | |
| Designer | Intel |
| Manufacturer | Intel |
| Model Number | W-2150B |
| Part Number | pEot, qjyM |
| S-Spec | cbNn, HvwW, ZWOv DdqO (QS), rlKK (QS), cAjK (QS) |
| Market | Workstation |
| Introduction | June 5, 2017 (announced) December 21, 2017 (launched) |
| End-of-life | DEMU (last order) NQEl (last shipment) |
| Release Price | NTyu PlQs (tray) VeAI (box) |
| Shop | Amazon |
| General Specs | |
| Family | Xeon W, hLcv |
| Series | W-2000 |
| Locked | crQO |
| Frequency | 3,000 MHz, bwBp |
| Turbo Frequency | vUnd |
| Turbo Frequency | 4,500 MHz (1 core), 4,500 MHz (2 cores), 4,300 MHz (3 cores), 4,100 MHz (5 cores), 4,100 MHz (6 cores), 4,100 MHz (8 cores), 3,800 MHz (9 cores), LquS (11 cores), ITOG (12 cores), Bytc (14 cores), YafF (15 cores), PzRf (17 cores), YojI (18 cores), ffDz (20 cores), FRWB (21 cores), RRhJ (23 cores), zFqq (24 cores), yKuP (26 cores), EGDC (27 cores), pRBy (29 cores), hyXR (30 cores), Xzlx (32 cores) |
| Bus type | DMI 3.0 |
| Bus speed | xxnv |
| Bus rate | 4 × 8 GT/s |
| Clock multiplier | 30 |
| CPUID | xOoQ, FmBz, gHGB |
| Neuromorphic Specs | |
| Neurons | kTsq |
| Synapses | hxyt |
| Microarchitecture | |
| ISA | x86-64 |
| Microarchitecture | Skylake (server), bygc |
| Platform | Basin Falls |
| Chipset | FFfU, BVLj |
| Core Name | Skylake W, dgeX |
| Core Family | 6, bWeV |
| Core Model | CUoC, pQDz |
| Core Stepping | U0, fQLH |
| Process | 14 nm, rycs |
| Transistors | EiHY |
| Technology | CMOS |
| Die | CXka |
| MCP | qgrV |
| Word Size | 64 bit |
| Cores | 10 |
| Threads | 20 |
| Max Memory | 512 GiB |
| Max Address Mem | pyjF |
| Multiprocessing | |
| Max SMP | 1-Way (Uniprocessor) |
| Interconnect | wCCQ |
| Interconnect Links | DZlW |
| Interconnect Rate | kRoD |
| Electrical | |
| Power dissipation | MbBx |
| Power dissipation (average) | HuDI |
| Power (idle) | KyzP |
| Vcore | sEVK ± yjDZ |
| Vcore | ffCE-unsi |
| VI/O | Lapn ± ylNg |
| SDP | Ysbp |
| TDP | GAEz, VsUK |
| TDP (Typical) | EojP |
| cTDP down | SPIZ |
| cTDP down frequency | VBrU |
| cTDP up | ezNP |
| cTDP up frequency | WkKt |
| OP Temperature | chAo – Fjxl |
| Tjunction | pRbF – tvyP |
| Tcase | YfiB – qKWG |
| Tstorage | daaY – PnFG |
| Tambient | POtl – RXqr |
| TDTS | fYRz – cMLv |
| Packaging | |
| Unknown package "Lgom" | |
| wViU | |
| Jpyv | |
| Succession | |
| Contemporary | |
| pipL | |
W-2150B is a 64-bit deca-core x86 enterprise performance workstation microprocessor introduced by Intel in 2017.
- This processors, which is fabricated on an enhanced 14nm+ process based on the Skylake server microarchitecture,
- operates at 3.0 GHz with a TDP of 120 W and a turbo boost frequency of up to 4.5 GHz.
- This chip supports up to 512 GiB of quad-channel DDR4-2666 ECC memory.
- This specific model appears to be a special model for Apple for their iMac Pro.
Cache
- Main article: Skylake § Cache
|
Cache Organization
Cache is a hardware component containing a relatively small and extremely fast memory designed to speed up the performance of a CPU by preparing ahead of time the data it needs to read from a relatively slower medium such as main memory. The organization and amount of cache can have a large impact on the performance, power consumption, die size, and consequently cost of the IC. Cache is specified by its size, number of sets, associativity, block size, sub-block size, and fetch and write-back policies. Note: All units are in kibibytes and mebibytes. |
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Memory controller
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Integrated Memory Controller
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Expansions
Expansion Options |
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Features
[Edit/Modify Supported Features]
Frequencies
- See also: Intel's CPU Frequency Behavior
| Mode | Base | Turbo Frequency/Active Cores | |||||||||
|---|---|---|---|---|---|---|---|---|---|---|---|
| 1 | 2 | 3 | 4 | 5 | 6 | 7 | 8 | 9 | 10 | ||
| Normal | 3,000 MHz | 4,500 MHz | 4,500 MHz | 4,300 MHz | 4,300 MHz | 4,100 MHz | 4,100 MHz | 4,100 MHz | 4,100 MHz | 3,800 MHz | 3,800 MHz |
| AVX2 | 4,000 MHz | 4,000 MHz | 3,800 MHz | 3,800 MHz | 3,700 MHz | 3,700 MHz | 3,700 MHz | 3,700 MHz | 3,400 MHz | 3,400 MHz | |
| AVX512 | 4,000 MHz | 4,000 MHz | 3,800 MHz | 3,800 MHz | 3,200 MHz | 3,200 MHz | 3,200 MHz | 3,200 MHz | 3,000 MHz | 3,000 MHz | |
Facts about "Xeon W-2150B - Intel"
| Has subobject "Has subobject" is a predefined property representing a container construct and is provided by Semantic MediaWiki. | Xeon W-2150B - Intel#pcie + |
| base frequency | 3,000 MHz (3 GHz, 3,000,000 kHz) + |
| bus links | 4 + |
| bus rate | 8,000 MT/s (8 GT/s, 8,000,000 kT/s) + |
| bus type | DMI 3.0 + |
| clock multiplier | 30 + |
| core count | 10 + |
| core family | 6 + |
| core name | Skylake W + |
| core stepping | U0 + |
| designer | Intel + |
| family | Xeon W + |
| first announced | June 5, 2017 + |
| first launched | December 21, 2017 + |
| full page name | intel/xeon w/w-2150b + |
| has advanced vector extensions | true + |
| has advanced vector extensions 2 | true + |
| has advanced vector extensions 512 | true + |
| has ecc memory support | true + |
| has extended page tables support | true + |
| has feature | Advanced Vector Extensions +, Advanced Vector Extensions 2 +, Advanced Encryption Standard Instruction Set Extension +, Hyper-Threading Technology +, Turbo Boost Technology 2.0 +, Enhanced SpeedStep Technology +, Speed Shift Technology +, Trusted Execution Technology +, Intel vPro Technology +, Intel VT-x +, Intel VT-d +, Transactional Synchronization Extensions +, Secure Key Technology +, OS Guard +, Identity Protection Technology +, Extended Page Tables +, Memory Protection Extensions + and Advanced Vector Extensions 512 + |
| has intel enhanced speedstep technology | true + |
| has intel identity protection technology support | true + |
| has intel secure key technology | true + |
| has intel speed shift technology | true + |
| has intel supervisor mode execution protection | true + |
| has intel trusted execution technology | true + |
| has intel turbo boost technology 2 0 | true + |
| has intel vpro technology | true + |
| has intel vt-d technology | true + |
| has intel vt-x technology | true + |
| has locked clock multiplier | true + |
| has second level address translation support | true + |
| has simultaneous multithreading | true + |
| has transactional synchronization extensions | true + |
| has x86 advanced encryption standard instruction set extension | true + |
| instance of | microprocessor + |
| isa | x86-64 + |
| isa family | x86 + |
| l1$ size | 640 KiB (655,360 B, 0.625 MiB) + |
| l1d$ description | 8-way set associative + |
| l1d$ size | 320 KiB (327,680 B, 0.313 MiB) + |
| l1i$ description | 8-way set associative + |
| l1i$ size | 320 KiB (327,680 B, 0.313 MiB) + |
| l2$ description | 16-way set associative + |
| l2$ size | 10 MiB (10,240 KiB, 10,485,760 B, 0.00977 GiB) + |
| l3$ description | 11-way set associative + |
| l3$ size | 13.75 MiB (14,080 KiB, 14,417,920 B, 0.0134 GiB) + |
| ldate | 3000 + |
| main image | |
| manufacturer | Intel + |
| market segment | Workstation + |
| max cpu count | 1 + |
| max memory | 524,288 MiB (536,870,912 KiB, 549,755,813,888 B, 512 GiB, 0.5 TiB) + |
| max memory bandwidth | 79.47 GiB/s (81,377.28 MiB/s, 85.33 GB/s, 85,330.263 MB/s, 0.0776 TiB/s, 0.0853 TB/s) + |
| max memory channels | 4 + |
| microarchitecture | Skylake (server) + |
| model number | W-2150B + |
| name | Xeon W-2150B + |
| number of avx-512 execution units | 2 + |
| package | FCLGA-2066 + |
| platform | Basin Falls + |
| process | 14 nm (0.014 μm, 1.4e-5 mm) + |
| series | W-2000 + |
| smp max ways | 1 + |
| socket | Socket R4 + |
| supported memory type | DDR4-2666 + |
| technology | CMOS + |
| thread count | 20 + |
| turbo frequency (10 cores) | 3,800 MHz (3.8 GHz, 3,800,000 kHz) + |
| turbo frequency (1 core) | 4,500 MHz (4.5 GHz, 4,500,000 kHz) + |
| turbo frequency (2 cores) | 4,500 MHz (4.5 GHz, 4,500,000 kHz) + |
| turbo frequency (3 cores) | 4,300 MHz (4.3 GHz, 4,300,000 kHz) + |
| turbo frequency (4 cores) | 4,300 MHz (4.3 GHz, 4,300,000 kHz) + |
| turbo frequency (5 cores) | 4,100 MHz (4.1 GHz, 4,100,000 kHz) + |
| turbo frequency (6 cores) | 4,100 MHz (4.1 GHz, 4,100,000 kHz) + |
| turbo frequency (7 cores) | 4,100 MHz (4.1 GHz, 4,100,000 kHz) + |
| turbo frequency (8 cores) | 4,100 MHz (4.1 GHz, 4,100,000 kHz) + |
| turbo frequency (9 cores) | 3,800 MHz (3.8 GHz, 3,800,000 kHz) + |
| word size | 64 bit (8 octets, 16 nibbles) + |
| x86/has memory protection extensions | true + |
