Semiconductor & Computer Engineering
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Difference between revisions of "intel/celeron/p4505"
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| s-spec qs = | | s-spec qs = | ||
| cpuid = 0x20655 | | cpuid = 0x20655 | ||
| + | |||
| + | | microarch = Westmere | ||
| + | | platform = Calpella | ||
| + | | chipset = Ibex Peak | ||
| + | | core name = Arrandale | ||
| + | | core family = 6 | ||
| + | | core model = 37 | ||
| + | | core stepping = C2 | ||
| + | | process = 32 nm | ||
| + | | transistors = 382,000,000 | ||
| + | | technology = CMOS | ||
| + | | die area = 81 mm² | ||
| + | | die width = | ||
| + | | die length = | ||
| + | | word size = 64 bit | ||
| + | | core count = 2 | ||
| + | | thread count = 2 | ||
| + | | max cpus = 1 | ||
| + | | max memory = 8 GiB | ||
| + | |||
| + | | electrical = Yes | ||
| + | | v core = | ||
| + | | v core tolerance = | ||
| + | | v io = | ||
| + | | v io tolerance = | ||
| + | | sdp = | ||
| + | | tdp = 35 W | ||
| + | | tjunc min = 0 °C | ||
| + | | tjunc max = 90 °C | ||
| + | | tcase min = | ||
| + | | tcase max = | ||
| + | | tstorage min = -25 °C | ||
| + | | tstorage max = 125 °C | ||
| + | | tambient min = | ||
| + | | tambient max = | ||
| + | |||
| + | | package module 1 = {{packages/intel/bga-1288}} | ||
}} | }} | ||
'''Celeron P4505''' is a {{arch|64}} [[dual-core]] [[x86]] mobile microprocessor introduced by [[Intel]] in [[2010]]. This processor operates at a frequency of 1.86 GHz and a TDP of 35 W. This MPU is manufactured on a [[32 nm process]] based on the {{intel|Westmere|l=arch}} microarchitecture ({{intel|Arrandale|l=core}} core). This processor incorporated the {{intel|HD Graphics (Ironlake)}} [[IGP]] on the same package operating at a base frequency of 500.00 MHz and a burst frequency of 667.00 MHz. | '''Celeron P4505''' is a {{arch|64}} [[dual-core]] [[x86]] mobile microprocessor introduced by [[Intel]] in [[2010]]. This processor operates at a frequency of 1.86 GHz and a TDP of 35 W. This MPU is manufactured on a [[32 nm process]] based on the {{intel|Westmere|l=arch}} microarchitecture ({{intel|Arrandale|l=core}} core). This processor incorporated the {{intel|HD Graphics (Ironlake)}} [[IGP]] on the same package operating at a base frequency of 500.00 MHz and a burst frequency of 667.00 MHz. | ||
Revision as of 01:38, 1 December 2016
Template:mpu Celeron P4505 is a 64-bit dual-core x86 mobile microprocessor introduced by Intel in 2010. This processor operates at a frequency of 1.86 GHz and a TDP of 35 W. This MPU is manufactured on a 32 nm process based on the Westmere microarchitecture (Arrandale core). This processor incorporated the HD Graphics (Ironlake) IGP on the same package operating at a base frequency of 500.00 MHz and a burst frequency of 667.00 MHz.