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Difference between revisions of "intel/celeron/b820"
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{{intel title|Celeron B820}}
 
{{intel title|Celeron B820}}
−
{{mpu
+
{{chip
 
|name=Celeron B820
 
|name=Celeron B820
 
|no image=Yes
 
|no image=Yes
Line 9: Line 9:
 
|s-spec=SR0HQ
 
|s-spec=SR0HQ
 
|market=Mobile
 
|market=Mobile
 +
|first announced=July, 2012
 +
|first launched=July, 2012
 +
|release price=$86.00
 
|family=Celeron
 
|family=Celeron
 
|series=800
 
|series=800
Line 46: Line 49:
 
|package module 1={{packages/intel/pga-988b}}
 
|package module 1={{packages/intel/pga-988b}}
 
}}
 
}}
 +
'''Celeron B820''' is a [[dual-core]] budget mobile [[x86]] microprocessor introduced by [[Intel]] in mid-[[2012]]. The Celeron B820, which is based on the {{intel|Sandy Bridge|l=arch}} microarchitecture and is manufactured on a [[32 nm process]], operates at 1.7 GHz with a [[TDP]] of 35 W. This chip incorporates Intel's {{intel|HD Graphics (Sandy Bridge)|HD Graphics}} [[integrated graphics]] operating at 650 MHz with a burst frequency of 1.05 GHz. This processor supports 16 GiB of dual-channel DDR3-1333 memory.
  
 
== Cache ==
 
== Cache ==
Line 126: Line 130:
  
 
== Features ==
 
== Features ==
−
{{x86 features}}
+
{{x86 features
 +
|real=Yes
 +
|protected=Yes
 +
|smm=Yes
 +
|fpu=Yes
 +
|x8616=Yes
 +
|x8632=Yes
 +
|x8664=Yes
 +
|nx=Yes
 +
|mmx=Yes
 +
|emmx=Yes
 +
|sse=Yes
 +
|sse2=Yes
 +
|sse3=Yes
 +
|ssse3=Yes
 +
|sse41=Yes
 +
|sse42=Yes
 +
|sse4a=No
 +
|avx=No
 +
|avx2=No
 +
|avx512f=No
 +
|avx512cd=No
 +
|avx512er=No
 +
|avx512pf=No
 +
|avx512bw=No
 +
|avx512dq=No
 +
|avx512vl=No
 +
|avx512ifma=No
 +
|avx512vbmi=No
 +
|avx5124fmaps=No
 +
|avx5124vnniw=No
 +
|avx512vpopcntdq=No
 +
|abm=No
 +
|tbm=No
 +
|bmi1=No
 +
|bmi2=No
 +
|fma3=No
 +
|fma4=No
 +
|aes=No
 +
|rdrand=No
 +
|sha=No
 +
|xop=No
 +
|adx=No
 +
|clmul=Yes
 +
|f16c=No
 +
|tbt1=No
 +
|tbt2=No
 +
|tbmt3=No
 +
|bpt=No
 +
|eist=Yes
 +
|sst=No
 +
|flex=Yes
 +
|fastmem=Yes
 +
|ivmd=No
 +
|intelnodecontroller=No
 +
|intelnode=No
 +
|kpt=No
 +
|ptt=No
 +
|intelrunsure=No
 +
|mbe=No
 +
|isrt=No
 +
|sba=No
 +
|mwt=No
 +
|sipp=No
 +
|att=No
 +
|ipt=No
 +
|tsx=No
 +
|txt=No
 +
|ht=No
 +
|vpro=No
 +
|vtx=Yes
 +
|vtd=No
 +
|ept=No
 +
|mpx=No
 +
|sgx=No
 +
|securekey=No
 +
|osguard=No
 +
|intqat=No
 +
|3dnow=No
 +
|e3dnow=No
 +
|smartmp=No
 +
|powernow=No
 +
|amdvi=No
 +
|amdv=No
 +
|amdsme=No
 +
|amdtsme=No
 +
|amdsev=No
 +
|rvi=No
 +
|smt=No
 +
|sensemi=No
 +
|xfr=No
 +
}}
 +
 
 +
== Documents ==
 +
=== Datasheet ===
 +
* [[:File:2nd-gen-core-family-mobile-vol-1-datasheet.pdf|Datasheet, Volume 1]]
 +
* [[:File:2nd-gen-core-family-mobile-vol-2-datasheet.pdf|Datasheet, Volume 2]]
 +
=== Other ===
 +
* [[:File:2nd-gen-core-mobile-thermal-guide.pdf|Thermal Design Guide for Embedded Applications]]
 +
* [[:File:2nd-gen-core-family-mobile-specification-update.pdf|2nd Gen Core Mobile Specification Update]]

Latest revision as of 18:22, 17 March 2018

Edit Values
Celeron B820
General Info
DesignerIntel
ManufacturerIntel
Model NumberB820
Part NumberFF8062700848602
S-SpecSR0HQ
MarketMobile
IntroductionJuly, 2012 (announced)
July, 2012 (launched)
Release Price$86.00
ShopAmazon
General Specs
FamilyCeleron
Series800
LockedYes
Frequency1,700 MHz
Bus typeDMI 2.0
Bus rate4 × 5 GT/s
Clock multiplier17
CPUID0x206A7
Microarchitecture
ISAx86-64 (x86)
MicroarchitectureSandy Bridge
PlatformSandy Bridge M
ChipsetCougar Point
Core NameSandy Bridge M
Core Family6
Core Model42
Core SteppingQ0
Process32 nm
Transistors504,000,000
TechnologyCMOS
Die131 mm²
Word Size64 bit
Cores2
Threads2
Max Memory16 GiB
Multiprocessing
Max SMP1-Way (Uniprocessor)
Electrical
Power (idle)3.1 W
Vcore0.3 V-1.52 V
TDP35 W
Tjunction0 °C – 100 °C
Tstorage-25 °C – 125 °C
Packaging
PackagerPGA988B (PGA)
Dimension37.5 mm x 37.5 mm
Pitch1 mm
Contacts988
SocketSocket G2

Celeron B820 is a dual-core budget mobile x86 microprocessor introduced by Intel in mid-2012. The Celeron B820, which is based on the Sandy Bridge microarchitecture and is manufactured on a 32 nm process, operates at 1.7 GHz with a TDP of 35 W. This chip incorporates Intel's HD Graphics integrated graphics operating at 650 MHz with a burst frequency of 1.05 GHz. This processor supports 16 GiB of dual-channel DDR3-1333 memory.

Cache[edit]

Main article: Sandy Bridge § Cache

[Edit/Modify Cache Info]

hierarchy icon.svg
Cache Organization
Cache is a hardware component containing a relatively small and extremely fast memory designed to speed up the performance of a CPU by preparing ahead of time the data it needs to read from a relatively slower medium such as main memory.

The organization and amount of cache can have a large impact on the performance, power consumption, die size, and consequently cost of the IC.

Cache is specified by its size, number of sets, associativity, block size, sub-block size, and fetch and write-back policies.

Note: All units are in kibibytes and mebibytes.
L1$128 KiB
131,072 B
0.125 MiB
L1I$64 KiB
65,536 B
0.0625 MiB
2x32 KiB8-way set associative 
L1D$64 KiB
65,536 B
0.0625 MiB
2x32 KiB8-way set associativewrite-back
L2$512 KiB
0.5 MiB
524,288 B
4.882812e-4 GiB
  2x256 KiB8-way set associativewrite-back
L3$2 MiB
2,048 KiB
2,097,152 B
0.00195 GiB
  2x1 MiB8-way set associativewrite-back

Memory controller[edit]

[Edit/Modify Memory Info]

ram icons.svg
Integrated Memory Controller
Max TypeDDR3-1333, DDR3-1066
Supports ECCNo
Max Mem16 GiB
Controllers1
Channels2
Max Bandwidth19.87 GiB/s
20,346.88 MiB/s
21.335 GB/s
21,335.25 MB/s
0.0194 TiB/s
0.0213 TB/s
Bandwidth
Single 9.93 GiB/s
Double 19.87 GiB/s

Expansions[edit]

[Edit/Modify Expansions Info]

ide icon.svg
Expansion Options
PCIeRevision: 2.0
Max Lanes: 16
Configuration: 1x16, 2x8, 1x8+2x4


Graphics[edit]

[Edit/Modify IGP Info]

screen icon.svg
Integrated Graphics Information
GPUHD Graphics (Sandy Bridge)
DesignerIntelDevice ID0x0106
Execution Units6Max Displays2
Frequency650 MHz
0.65 GHz
650,000 KHz
Burst Frequency1,050 MHz
1.05 GHz
1,050,000 KHz
OutputDP, eDP, HDMI, SDVO, CRT
Standards
DirectX10.1
OpenGL3.1
DP1.1
eDP1.1
HDMI1.4
Additional Features
Intel Flexible Display Interface (FDI)

Features[edit]

Documents[edit]

Datasheet[edit]

Other[edit]

Retrieved from "https://en.wikichip.org/w/index.php?title=intel/celeron/b820&oldid=75303"
Facts about "Celeron B820 - Intel"
RDF feed
Has subobject
"Has subobject" is a predefined property representing a container construct and is provided by Semantic MediaWiki.
Celeron B820 - Intel#pcie +
device id0x0106 +
has ecc memory supportfalse +
integrated gpuHD Graphics (Sandy Bridge) +
integrated gpu base frequency650 MHz (0.65 GHz, 650,000 KHz) +
integrated gpu designerIntel +
integrated gpu execution units6 +
integrated gpu max frequency1,050 MHz (1.05 GHz, 1,050,000 KHz) +
l1$ size128 KiB (131,072 B, 0.125 MiB) +
l1d$ description8-way set associative +
l1d$ size64 KiB (65,536 B, 0.0625 MiB) +
l1i$ description8-way set associative +
l1i$ size64 KiB (65,536 B, 0.0625 MiB) +
l2$ description8-way set associative +
l2$ size0.5 MiB (512 KiB, 524,288 B, 4.882812e-4 GiB) +
l3$ description8-way set associative +
l3$ size2 MiB (2,048 KiB, 2,097,152 B, 0.00195 GiB) +
max memory bandwidth19.87 GiB/s (20,346.88 MiB/s, 21.335 GB/s, 21,335.25 MB/s, 0.0194 TiB/s, 0.0213 TB/s) +
max memory channels2 +
supported memory typeDDR3-1333 + and DDR3-1066 +