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Difference between revisions of "intel/xeon platinum/8158"
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|sensemi=No | |sensemi=No | ||
|xfr=No | |xfr=No | ||
+ | }} | ||
+ | |||
+ | == Frequencies == | ||
+ | {{see also|intel/frequency_behavior|l1=Intel's CPU Frequency Behavior}} | ||
+ | {{frequency table | ||
+ | |freq_base=3,000 MHz | ||
+ | |freq_1=3,700 MHz | ||
+ | |freq_2=3,700 MHz | ||
+ | |freq_3=3,600 MHz | ||
+ | |freq_4=3,600 MHz | ||
+ | |freq_5=3,600 MHz | ||
+ | |freq_6=3,600 MHz | ||
+ | |freq_7=3,600 MHz | ||
+ | |freq_8=3,600 MHz | ||
+ | |freq_9=3,600 MHz | ||
+ | |freq_10=3,600 MHz | ||
+ | |freq_11=3,600 MHz | ||
+ | |freq_12=3,600 MHz | ||
+ | |freq_avx2_base=2,600 MHz | ||
+ | |freq_avx2_1=3,600 MHz | ||
+ | |freq_avx2_2=3,600 MHz | ||
+ | |freq_avx2_3=3,400 MHz | ||
+ | |freq_avx2_4=3,400 MHz | ||
+ | |freq_avx2_5=3,300 MHz | ||
+ | |freq_avx2_6=3,300 MHz | ||
+ | |freq_avx2_7=3,300 MHz | ||
+ | |freq_avx2_8=3,300 MHz | ||
+ | |freq_avx2_9=3,300 MHz | ||
+ | |freq_avx2_10=3,300 MHz | ||
+ | |freq_avx2_11=3,300 MHz | ||
+ | |freq_avx2_12=3,300 MHz | ||
+ | |freq_avx512_base=2,100 MHz | ||
+ | |freq_avx512_1=3,500 MHz | ||
+ | |freq_avx512_2=3,500 MHz | ||
+ | |freq_avx512_3=3,300 MHz | ||
+ | |freq_avx512_4=3,300 MHz | ||
+ | |freq_avx512_5=3,100 MHz | ||
+ | |freq_avx512_6=3,100 MHz | ||
+ | |freq_avx512_7=3,100 MHz | ||
+ | |freq_avx512_8=3,100 MHz | ||
+ | |freq_avx512_9=2,700 MHz | ||
+ | |freq_avx512_10=2,700 MHz | ||
+ | |freq_avx512_11=2,700 MHz | ||
+ | |freq_avx512_12=2,700 MHz | ||
}} | }} |
Revision as of 01:01, 17 July 2017
Template:mpu Xeon Platinum 8158 is a 64-bit dodeca-core x86 multi-socket highest performance server microprocessor introduced by Intel in mid-2017. This chip supports up to 8-way multiprocessing. The Platinum 8158, which is based on the server configuration of the Skylake microarchitecture and is manufactured on a 14 nm+ process, sports 2 AVX-512 FMA units as well as three Ultra Path Interconnect links. This microprocessor, which operates at 3 GHz with a TDP of 150 W and a turbo boost frequency of up to 3.7 GHz, supports up 768 GiB of hexa-channel DDR4-2666 ECC memory.
Cache
- Main article: Skylake § Cache
The Xeon Platinum 8158 features a considerably larger non-default 24.75 MiB of L3, a size that would normally be found on an 18-core part.
Cache Organization
Cache is a hardware component containing a relatively small and extremely fast memory designed to speed up the performance of a CPU by preparing ahead of time the data it needs to read from a relatively slower medium such as main memory. The organization and amount of cache can have a large impact on the performance, power consumption, die size, and consequently cost of the IC. Cache is specified by its size, number of sets, associativity, block size, sub-block size, and fetch and write-back policies. Note: All units are in kibibytes and mebibytes. |
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Memory controller
Integrated Memory Controller
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Expansions
Expansion Options
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Features
[Edit/Modify Supported Features]
Supported x86 Extensions & Processor Features
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Frequencies
- See also: Intel's CPU Frequency Behavior
Mode | Base | Turbo Frequency/Active Cores | |||||||||||
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1 | 2 | 3 | 4 | 5 | 6 | 7 | 8 | 9 | 10 | 11 | 12 | ||
Normal | 3,000 MHz | 3,700 MHz | 3,700 MHz | 3,600 MHz | 3,600 MHz | 3,600 MHz | 3,600 MHz | 3,600 MHz | 3,600 MHz | 3,600 MHz | 3,600 MHz | 3,600 MHz | 3,600 MHz |
AVX2 | 2,600 MHz | 3,600 MHz | 3,600 MHz | 3,400 MHz | 3,400 MHz | 3,300 MHz | 3,300 MHz | 3,300 MHz | 3,300 MHz | 3,300 MHz | 3,300 MHz | 3,300 MHz | 3,300 MHz |
AVX512 | 2,100 MHz | 3,500 MHz | 3,500 MHz | 3,300 MHz | 3,300 MHz | 3,100 MHz | 3,100 MHz | 3,100 MHz | 3,100 MHz | 2,700 MHz | 2,700 MHz | 2,700 MHz | 2,700 MHz |
Facts about "Xeon Platinum 8158 - Intel"