From WikiChip
Difference between revisions of "intel/microarchitectures/sierra forest"
< intel‎ | microarchitectures

(→‎CPUID)
Line 29: Line 29:
 
! Core !! Extended<br>Family !! Family !! Extended<br>Model !! Model
 
! Core !! Extended<br>Family !! Family !! Extended<br>Model !! Model
 
|-
 
|-
−
| rowspan="2" | SP || 0 || 0x6 || 0x8 || AxF
+
| rowspan="2" | <!-- Crestmont --> SP || 0 || 0x6 || 0xA || 0xF
 +
|-
 +
| colspan="4" | [[Family 6 Model 175]]
 
|-
 
|-
−
| colspan="4" | Family 6 Model 0
 
 
|}
 
|}
  

Revision as of 18:54, 11 February 2025

Edit Values
Sierra Forest µarch
General Info
Arch TypeCPU
DesignerIntel
ManufacturerIntel
Introduction2024
ProcessIntel 3
Instructions
ISAx86-64
Succession
Contemporary
Granite Rapids

Sierra Forest (SRF) is a new Atom based architecture for servers, built on Intel's 3 nm node.

History

Intel Xeon Roadmap through 2024.

Sierra Forest was announced at the 2022 Intel Investor Meeting, it is a new microarchitecture that will day view alongside Granite Rapids in 2023.

Process Technology

Emerald rapids is planned to be manufactured on the Intel 3 process.


CPUID

Core Extended
Family 		Family Extended
Model 		Model
SP 0 0x6 0xA 0xF
Family 6 Model 175

Architecture

Key changes from Saphire Rapids

New instructions

Sierra Forest is set to introduce new instructions:

  • CMPCCXADD - Compare and Add if Condition is Met
  • AVX IFMA - Integer Fused Multiply Add
  • AVX VNNI INT8 - AVX Vector Neural Network Instructions INT8
  • LASS - Linear Address Space Separation


This list is incomplete; you can help by expanding it.

See also

Retrieved from "https://en.wikichip.org/w/index.php?title=intel/microarchitectures/sierra_forest&oldid=102767"
Facts about "Sierra Forest - Microarchitectures - Intel"
RDF feed
codenameSierra Forest +
designerIntel +
first launched2024 +
full page nameintel/microarchitectures/sierra forest +
instance ofmicroarchitecture +
instruction set architecturex86-64 +
manufacturerIntel +
microarchitecture typeCPU +
nameSierra Forest +