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{{microarchitecture | {{microarchitecture | ||
|atype=CPU | |atype=CPU | ||
− | |name= | + | |name=Mongoose 4 |
|designer=Samsung | |designer=Samsung | ||
|manufacturer=Samsung | |manufacturer=Samsung | ||
− | |introduction= | + | |introduction=2018 |
|process=8 nm | |process=8 nm | ||
− | + | |isa=ARMv8 | |
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− | |isa=ARMv8 | ||
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|predecessor=M3 | |predecessor=M3 | ||
|predecessor link=samsung/microarchitectures/m3 | |predecessor link=samsung/microarchitectures/m3 | ||
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|successor link=samsung/microarchitectures/m5 | |successor link=samsung/microarchitectures/m5 | ||
}} | }} | ||
− | '''Exynos | + | '''Exynos Mongoose 4''' ('''M4''') is the successor to the {{\\|Mongoose 3}}, an [[8 nm]] [[ARM]] microarchitecture designed by [[Samsung]] for their consumer electronics. |
== Process Technology == | == Process Technology == | ||
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* [[ARMv8.2]] (from [[ARMv8]]) | * [[ARMv8.2]] (from [[ARMv8]]) | ||
** Support for full FP16 scalar extension | ** Support for full FP16 scalar extension | ||
− | ** | + | ** Suppot for integer dot product extension |
* Front end | * Front end | ||
** Larger [[instruction queue]] (48 entries, up from 40) | ** Larger [[instruction queue]] (48 entries, up from 40) | ||
* Back end | * Back end | ||
− | ** LSU | + | ** LSU reorganized |
** Floating-point execution units reorganized | ** Floating-point execution units reorganized | ||
{{expand list}} | {{expand list}} | ||
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Facts about "Exynos M4 - Microarchitectures - Samsung"
codename | Cheetah + |
core count | 4 + |
designer | Samsung + |
first launched | 2019 + |
full page name | samsung/microarchitectures/m4 + |
instance of | microarchitecture + |
instruction set architecture | ARMv8.2 + |
manufacturer | Samsung + |
microarchitecture type | CPU + |
name | Cheetah + |
pipeline stages | 16 + |
process | 8 nm (0.008 μm, 8.0e-6 mm) + |