From WikiChip
Editing samsung/microarchitectures/m1
Warning: You are not logged in. Your IP address will be publicly visible if you make any edits. If you log in or create an account, your edits will be attributed to your username, along with other benefits.
The edit can be undone.
Please check the comparison below to verify that this is what you want to do, and then save the changes below to finish undoing the edit.
This page supports semantic in-text annotations (e.g. "[[Is specified as::World Heritage Site]]") to build structured and queryable content provided by Semantic MediaWiki. For a comprehensive description on how to use annotations or the #ask parser function, please have a look at the getting started, in-text annotation, or inline queries help pages.
Latest revision | Your text | ||
Line 1: | Line 1: | ||
− | {{samsung title| | + | {{samsung title|Mongoose 1 (M1)|arch}} |
{{microarchitecture | {{microarchitecture | ||
|atype=CPU | |atype=CPU | ||
Line 12: | Line 12: | ||
|speculative=Yes | |speculative=Yes | ||
|renaming=Yes | |renaming=Yes | ||
− | |||
|decode=4-way | |decode=4-way | ||
|isa=ARMv8 | |isa=ARMv8 | ||
Line 27: | Line 26: | ||
|successor link=samsung/microarchitectures/m2 | |successor link=samsung/microarchitectures/m2 | ||
}} | }} | ||
− | ''' | + | '''Mongoose 1''' ('''M1''') is an [[ARM]] microarchitecture designed by [[Samsung]] for their consumer electronics. This was Samsung's first in-house developed high-performance low-power [[ARM]] microarchitecture. |
== History == | == History == | ||
Line 40: | Line 39: | ||
! Compiler !! Arch-Specific || Arch-Favorable | ! Compiler !! Arch-Specific || Arch-Favorable | ||
|- | |- | ||
− | | [[GCC]] || <code>- | + | | [[GCC]] || <code>-march=armv8-a+crypto</code> || <code>-mtune=exynos-m1</code> |
− | |||
− | |||
|} | |} | ||
Line 108: | Line 105: | ||
** 64-entry µBTB | ** 64-entry µBTB | ||
** 64-entry return stack | ** 64-entry return stack | ||
− | |||
== Overview == | == Overview == | ||
Line 191: | Line 187: | ||
=== Core Cluster Floorplan === | === Core Cluster Floorplan === | ||
− | :[[File:mongoose 1 core cluster.png | + | :[[File:mongoose 1 core cluster.png|500px]] |
Line 230: | Line 226: | ||
{{comp table end}} | {{comp table end}} | ||
− | == | + | == References == |
* Burgess, Brad. "Samsung exynos M1 processor." Hot Chips 28 Symposium (HCS), 2016 IEEE. IEEE, 2016. | * Burgess, Brad. "Samsung exynos M1 processor." Hot Chips 28 Symposium (HCS), 2016 IEEE. IEEE, 2016. | ||
* LLVM: lib/Target/AArch64/AArch64SchedExynosM1.td | * LLVM: lib/Target/AArch64/AArch64SchedExynosM1.td |
Facts about "Exynos M1 - Microarchitectures - Samsung"
codename | Mongoose 1 + |
core count | 4 + |
designer | Samsung + |
first launched | November 12, 2015 + |
full page name | samsung/microarchitectures/m1 + |
instance of | microarchitecture + |
instruction set architecture | ARMv8 + |
manufacturer | Samsung + |
microarchitecture type | CPU + |
name | Mongoose 1 + |
phase-out | 2017 + |
pipeline stages | 14 + |
process | 14 nm (0.014 μm, 1.4e-5 mm) + |