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{{pezy title|PEZY-SC4}} | {{pezy title|PEZY-SC4}} | ||
− | {{ | + | {{mpu |
|future=Yes | |future=Yes | ||
|name=PEZY-SC4 | |name=PEZY-SC4 | ||
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|designer=PEZY | |designer=PEZY | ||
|manufacturer=TSMC | |manufacturer=TSMC | ||
− | |model number=PEZY- | + | |model number=PEZY-SC2 |
|market=Supercomputer | |market=Supercomputer | ||
|first announced=2016 | |first announced=2016 | ||
|first launched=2020 | |first launched=2020 | ||
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|frequency=1,600 MHz | |frequency=1,600 MHz | ||
|process=5 nm | |process=5 nm | ||
|technology=CMOS | |technology=CMOS | ||
|die area=740 mm² | |die area=740 mm² | ||
− | |core count=16, | + | |core count=16,192 |
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|power=640 W | |power=640 W | ||
|v core=0.55 V | |v core=0.55 V | ||
}} | }} | ||
− | '''PEZY-SC4''' ('''PEZY Super Computer 4''') is | + | '''PEZY-SC4''' ('''PEZY Super Computer 4''') is fifth generation [[many-core microprocessor]] planned by [[PEZY]]. The SC4 incorporates 16,192 cores, twice times as many cores as its predecessor. |
+ | Planned to be fabricated on TSMC's [[5 nm process]], PEZY-SC5 operates at 1.6 GHz and consume around 640 W while delivering performance in the order of 210 TFLOPS (HP), 105 TFLOPS (SP), and 52.5 TFLOPS (DP). | ||
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− | + | {{unknown features}} | |
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== Memory controller == | == Memory controller == | ||
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{{memory controller | {{memory controller | ||
|type=DDR5-4000 | |type=DDR5-4000 | ||
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|controllers=4 | |controllers=4 | ||
|channels=4 | |channels=4 | ||
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|max bandwidth=119.2 GiB/s | |max bandwidth=119.2 GiB/s | ||
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|bandwidth qchan=119.2 GiB/s | |bandwidth qchan=119.2 GiB/s | ||
}} | }} | ||
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{{memory controller | {{memory controller | ||
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|max bandwidth=22.35 TiB/s | |max bandwidth=22.35 TiB/s | ||
}} | }} | ||
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Facts about "PEZY-SC4 - PEZY"
base frequency | 1,600 MHz (1.6 GHz, 1,600,000 kHz) + |
core count | 16,384 + |
core voltage | 0.55 V (5.5 dV, 55 cV, 550 mV) + |
designer | PEZY + |
die area | 740 mm² (1.147 in², 7.4 cm², 740,000,000 µm²) + |
family | PEZY-SCx + |
first announced | 2016 + |
first launched | 2020 + |
full page name | pezy/pezy-scx/pezy-sc4 + |
has ecc memory support | true + and false + |
instance of | microprocessor + |
ldate | 3000 + |
manufacturer | TSMC + |
market segment | Supercomputer + |
max memory bandwidth | 119.2 GiB/s (122,060.8 MiB/s, 127.99 GB/s, 127,990.025 MB/s, 0.116 TiB/s, 0.128 TB/s) + and 22,886.4 GiB/s (23,435,673.6 MiB/s, 24,574.085 GB/s, 24,574,084.881 MB/s, 22.35 TiB/s, 24.574 TB/s) + |
max memory channels | 4 + and 8 + |
model number | PEZY-SC4 + |
name | PEZY-SC4 + |
peak flops (double-precision) | 52,428,800,000,000 FLOPS (52,428,800,000 KFLOPS, 52,428,800 MFLOPS, 52,428.8 GFLOPS, 52.429 TFLOPS, 0.0524 PFLOPS, 5.24288e-5 EFLOPS, 5.24288e-8 ZFLOPS) + |
peak flops (half-precision) | 209,715,200,000,000 FLOPS (209,715,200,000 KFLOPS, 209,715,200 MFLOPS, 209,715.2 GFLOPS, 209.715 TFLOPS, 0.21 PFLOPS, 2.097152e-4 EFLOPS, 2.097152e-7 ZFLOPS) + |
peak flops (single-precision) | 104,857,600,000,000 FLOPS (104,857,600,000 KFLOPS, 104,857,600 MFLOPS, 104,857.6 GFLOPS, 104.858 TFLOPS, 0.105 PFLOPS, 1.048576e-4 EFLOPS, 1.048576e-7 ZFLOPS) + |
power dissipation | 640 W (640,000 mW, 0.858 hp, 0.64 kW) + |
process | 5 nm (0.005 μm, 5.0e-6 mm) + |
supported memory type | DDR5-4000 + |
technology | CMOS + |
thread count | 131,072 + |