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| {{intel title|Xeon Silver 4116}} | | {{intel title|Xeon Silver 4116}} |
− | {{chip | + | {{mpu}} |
− | |name=Xeon Silver 4116
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− | |image=skylake sp (basic).png
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− | |designer=Intel
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− | |manufacturer=Intel
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− | |model number=4116
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− | |part number=BX806734116
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− | |part number 2=CD8067303567200
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− | |s-spec=SR3HQ
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− | |s-spec qs=QN1J
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− | |market=Server
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− | |first announced=July 11, 2017
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− | |first launched=July 11, 2017
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− | |release price=$1002.00
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− | |family=Xeon Silver
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− | |series=4000
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− | |locked=Yes
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− | |frequency=2,100 MHz
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− | |turbo frequency1=3,000 MHz
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− | |clock multiplier=21
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− | |cpuid=0x50654
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− | |isa=x86-64
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− | |isa family=x86
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− | |microarch=Skylake (server)
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− | |platform=Purley
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− | |chipset=Lewisburg
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− | |core name=Skylake SP
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− | |core family=6
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− | |core stepping=M0
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− | |process=14 nm
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− | |technology=CMOS
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− | |word size=64 bit
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− | |core count=12
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− | |thread count=24
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− | |max memory=768 GiB
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− | |max cpus=2
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− | |smp interconnect=UPI
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− | |smp interconnect links=2
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− | |smp interconnect rate=9.6 GT/s
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− | |tdp=85 W
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− | |tcase min=0 °C
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− | |tcase max=76 °C
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− | |dts min=0 °C
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− | |dts max=87 °C
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− | |package name 1=intel,fclga_3647
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− | |successor=Xeon Silver 4216
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− | |successor link=intel/xeon_silver/4216
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− | }} | |
− | '''Xeon Silver 4116''' is a {{arch|64}} [[dodeca-core]] [[x86]] dual-socket mid-range performance server microprocessor introduced by [[Intel]] in mid-2017. The Silver 4116, which is based on the server configuration of the {{intel|Skylake (server)|Skylake|l=arch}} microarchitecture and is manufactured on a [[14 nm process]], sports 1 {{x86|AVX-512}} [[FMA]] unit as well as two {{intel|Ultra Path Interconnect}} links. This microprocessor, which operates at 2.1 GHz with a TDP of 85 W and a {{intel|turbo boost}} frequency of up to 3 GHz, supports up 768 GiB of hexa-channel DDR4-2400 ECC memory.
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− | | |
− | == Cache ==
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− | {{main|intel/microarchitectures/skylake_(server)#Memory_Hierarchy|l1=Skylake § Cache}}
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− | {{cache size
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− | |l1 cache=768 KiB
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− | |l1i cache=384 KiB
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− | |l1i break=12x32 KiB
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− | |l1i desc=8-way set associative
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− | |l1d cache=384 KiB
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− | |l1d break=12x32 KiB
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− | |l1d desc=8-way set associative
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− | |l1d policy=write-back
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− | |l2 cache=12 MiB
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− | |l2 break=12x1 MiB
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− | |l2 desc=16-way set associative
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− | |l2 policy=write-back
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− | |l3 cache=16.5 MiB
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− | |l3 break=12x1.375 MiB
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− | |l3 desc=11-way set associative
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− | |l3 policy=write-back
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− | }}
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− | | |
− | == Memory controller ==
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− | {{memory controller
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− | |type=DDR4-2400
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− | |ecc=Yes
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− | |max mem=768 GiB
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− | |controllers=2
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− | |channels=6
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− | |max bandwidth=107.3 GiB/s
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− | |bandwidth schan=17.88 GiB/s
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− | |bandwidth dchan=35.76 GiB/s
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− | |bandwidth qchan=71.53 GiB/s
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− | |bandwidth hchan=107.3 GiB/s
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− | }}
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− | | |
− | == Expansions ==
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− | {{expansions
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− | | pcie revision = 3.0
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− | | pcie lanes = 48
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− | | pcie config = x16
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− | | pcie config 2 = x8
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− | | pcie config 3 = x4
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− | }}
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− | | |
− | == Features ==
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− | {{x86 features
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− | |real=Yes
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− | |protected=Yes
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− | |smm=Yes
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− | |fpu=Yes
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− | |x8616=Yes
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− | |x8632=Yes
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− | |x8664=Yes
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− | |nx=Yes
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− | |mmx=Yes
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− | |emmx=Yes
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− | |sse=Yes
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− | |sse2=Yes
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− | |sse3=Yes
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− | |ssse3=Yes
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− | |sse41=Yes
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− | |sse42=Yes
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− | |sse4a=No
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− | |avx=Yes
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− | |avx2=Yes
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− | |avx512f=Yes
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− | |avx512cd=Yes
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− | |avx512er=No
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− | |avx512pf=No
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− | |avx512bw=Yes
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− | |avx512dq=Yes
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− | |avx512vl=Yes
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− | |avx512ifma=No
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− | |avx512vbmi=No
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− | |avx5124fmaps=No
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− | |avx5124vnniw=No
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− | |avx512vpopcntdq=No
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− | |abm=Yes
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− | |tbm=No
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− | |bmi1=Yes
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− | |bmi2=Yes
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− | |fma3=Yes
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− | |fma4=No
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− | |aes=Yes
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− | |rdrand=Yes
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− | |sha=No
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− | |xop=No
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− | |adx=Yes
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− | |clmul=Yes
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− | |f16c=Yes
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− | |tbt1=No
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− | |tbt2=Yes
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− | |tbmt3=No
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− | |bpt=No
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− | |eist=Yes
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− | |sst=Yes
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− | |flex=No
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− | |fastmem=No
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− | |ivmd=Yes
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− | |intelnode=Yes
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− | |kpt=Yes
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− | |ptt=Yes
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− | |mbe=Yes
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− | |isrt=No
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− | |sba=No
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− | |mwt=No
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− | |sipp=No
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− | |att=No
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− | |ipt=No
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− | |tsx=Yes
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− | |txt=Yes
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− | |ht=Yes
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− | |vpro=Yes
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− | |vtx=Yes
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− | |vtd=No
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− | |ept=Yes
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− | |mpx=No
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− | |sgx=No
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− | |securekey=No
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− | |osguard=No
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− | |3dnow=No
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− | |e3dnow=No
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− | |smartmp=No
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− | |powernow=No
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− | |amdvi=No
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− | |amdv=No
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− | |amdsme=No
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− | |amdtsme=No
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− | |amdsev=No
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− | |rvi=No
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− | |smt=No
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− | |sensemi=No
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− | |xfr=No
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− | }}
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− | | |
− | == Frequencies ==
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− | {{see also|intel/frequency_behavior|l1=Intel's CPU Frequency Behavior}}
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− | {{frequency table
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− | |freq_base=2,100 MHz
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− | |freq_1=3,000 MHz
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− | |freq_2=3,000 MHz
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− | |freq_3=2,800 MHz
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− | |freq_4=2,800 MHz
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− | |freq_5=2,700 MHz
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− | |freq_6=2,700 MHz
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− | |freq_7=2,700 MHz
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− | |freq_8=2,700 MHz
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− | |freq_9=2,400 MHz
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− | |freq_10=2,400 MHz
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− | |freq_11=2,400 MHz
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− | |freq_12=2,400 MHz
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− | |freq_avx2_base=1,700 MHz
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− | |freq_avx2_1=2,900 MHz
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− | |freq_avx2_2=2,900 MHz
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− | |freq_avx2_3=2,700 MHz
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− | |freq_avx2_4=2,700 MHz
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− | |freq_avx2_5=2,400 MHz
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− | |freq_avx2_6=2,400 MHz
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− | |freq_avx2_7=2,400 MHz
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− | |freq_avx2_8=2,400 MHz
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− | |freq_avx2_9=2,100 MHz
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− | |freq_avx2_10=2,100 MHz
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− | |freq_avx2_11=2,100 MHz
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− | |freq_avx2_12=2,100 MHz
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− | |freq_avx512_base=1,100 MHz
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− | |freq_avx512_1=1,800 MHz
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− | |freq_avx512_2=1,800 MHz
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− | |freq_avx512_3=1,600 MHz
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− | |freq_avx512_4=1,600 MHz
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− | |freq_avx512_5=1,500 MHz
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− | |freq_avx512_6=1,500 MHz
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− | |freq_avx512_7=1,500 MHz
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− | |freq_avx512_8=1,500 MHz
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− | |freq_avx512_9=1,400 MHz
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− | |freq_avx512_10=1,400 MHz
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− | |freq_avx512_11=1,400 MHz
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− | |freq_avx512_12=1,400 MHz
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− | }}
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− | | |
− | == Benchmarks ==
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− | {{benchmarks main
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− | |
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− | {{benchmark entry|type=spec_cpu2017|test_link=https://www.spec.org/cpu2017/results/res2017q4/cpu2017-20171017-00171.html|test_timestamp=2017-10-16 10:03:34-0400|chip_count=2|core_count=24|thread_count=24|vendor=HPE|system=ProLiant DL380 Gen10 (2.10 GHz, Intel Xeon Silver 4116)|SPECspeed2017_int_base=7.07|SPECspeed2017_int_peak=}}
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− | {{benchmark entry|type=spec_cpu2017|test_link=https://www.spec.org/cpu2017/results/res2017q4/cpu2017-20171017-00175.html|test_timestamp=2017-10-14 18:46:59-0400|chip_count=2|core_count=24|copies_count=48|vendor=HPE|system=ProLiant DL380 Gen10 (2.10 GHz, Intel Xeon Silver 4116)|SPECrate2017_fp_base=118|SPECrate2017_fp_peak=}}
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− | {{benchmark entry|type=spec_cpu2017|test_link=https://www.spec.org/cpu2017/results/res2017q4/cpu2017-20171017-00179.html|test_timestamp=2017-10-16 13:13:54-0400|chip_count=2|core_count=24|thread_count=24|vendor=HPE|system=ProLiant DL380 Gen10 (2.10 GHz, Intel Xeon Silver 4116)|SPECspeed2017_fp_base=76.4|SPECspeed2017_fp_peak=}}
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− | {{benchmark entry|type=spec_cpu2017|test_link=https://www.spec.org/cpu2017/results/res2017q4/cpu2017-20171017-00183.html|test_timestamp=2017-10-15 04:42:31-0400|chip_count=2|core_count=24|copies_count=48|vendor=HPE|system=ProLiant DL380 Gen10 (2.10 GHz, Intel Xeon Silver 4116)|SPECrate2017_int_base=108|SPECrate2017_int_peak=}}
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− | {{benchmark entry|type=spec_cpu2017|test_link=https://www.spec.org/cpu2017/results/res2017q4/cpu2017-20171031-00355.html|test_timestamp=2017-10-12 19:53:58-0400|chip_count=2|core_count=24|copies_count=48|vendor=HPE|system=ProLiant DL360 Gen10 (2.10 GHz, Intel Xeon Silver 4116)|SPECrate2017_fp_base=116|SPECrate2017_fp_peak=}}
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− | {{benchmark entry|type=spec_cpu2017|test_link=https://www.spec.org/cpu2017/results/res2017q4/cpu2017-20171031-00441.html|test_timestamp=2017-10-12 07:39:10-0400|chip_count=2|core_count=24|thread_count=24|vendor=HPE|system=ProLiant DL360 Gen10 (2.10 GHz, Intel Xeon Silver 4116)|SPECspeed2017_int_base=7.08|SPECspeed2017_int_peak=}}
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− | {{benchmark entry|type=spec_cpu2017|test_link=https://www.spec.org/cpu2017/results/res2017q4/cpu2017-20171031-00443.html|test_timestamp=2017-10-12 10:49:31-0400|chip_count=2|core_count=24|thread_count=24|vendor=HPE|system=ProLiant DL360 Gen10 (2.10 GHz, Intel Xeon Silver 4116)|SPECspeed2017_fp_base=76.4|SPECspeed2017_fp_peak=}}
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− | {{benchmark entry|type=spec_cpu2017|test_link=https://www.spec.org/cpu2017/results/res2017q4/cpu2017-20171031-00470.html|test_timestamp=2017-10-12 14:10:04-0400|chip_count=2|core_count=24|copies_count=48|vendor=HPE|system=ProLiant DL360 Gen10 (2.10 GHz, Intel Xeon Silver 4116)|SPECrate2017_int_base=109|SPECrate2017_int_peak=}}
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− | }}
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− | | |
− | [[Category:microprocessor models by intel based on skylake high core count die]]
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