From WikiChip
Editing intel/microarchitectures/golden cove
Warning: You are not logged in. Your IP address will be publicly visible if you make any edits. If you log in or create an account, your edits will be attributed to your username, along with other benefits.
The edit can be undone.
Please check the comparison below to verify that this is what you want to do, and then save the changes below to finish undoing the edit.
This page supports semantic in-text annotations (e.g. "[[Is specified as::World Heritage Site]]") to build structured and queryable content provided by Semantic MediaWiki. For a comprehensive description on how to use annotations or the #ask parser function, please have a look at the getting started, in-text annotation, or inline queries help pages.
Latest revision | Your text | ||
Line 5: | Line 5: | ||
|designer=Intel | |designer=Intel | ||
|manufacturer=Intel | |manufacturer=Intel | ||
− | |introduction= | + | |introduction=2H 2021 |
|process=10nm | |process=10nm | ||
|isa=x86-64 | |isa=x86-64 | ||
− | |core name=Alder Lake | + | |core name=Alder Lake |
|predecessor=Willow Cove | |predecessor=Willow Cove | ||
|predecessor link=intel/microarchitectures/willow cove | |predecessor link=intel/microarchitectures/willow cove | ||
− | + | |successor=Ocean Cove | |
− | + | |successor link=intel/microarchitectures/ocean cove | |
− | |successor= | ||
− | |successor link=intel/microarchitectures/ | ||
}} | }} | ||
− | '''Golden Cove''' is the successor to {{\\|Willow Cove}}, a high-performance [[10 nm]] [[x86]] core microarchitecture designed by [[Intel]] for an array of server and client products, including | + | '''Golden Cove''' is the successor to {{\\|Willow Cove}}, a high-performance [[10 nm]] [[x86]] core microarchitecture designed by [[Intel]] for an array of server and client products, including Granite Rapids(server) and Alder Lake(client). |
== History == | == History == | ||
Line 23: | Line 21: | ||
== Process Technology == | == Process Technology == | ||
− | Intel has confirmed that the Golden Cove architecture will be fabricated on their | + | Intel has confirmed that the Golden Cove architecture will be fabricated on their [[10 nm process]]. |
== Architecture == | == Architecture == | ||
=== Key changes from {{\\|Willow Cove}}=== | === Key changes from {{\\|Willow Cove}}=== | ||
* Performance improvements | * Performance improvements | ||
− | ** Strong IPC improvement | + | ** Strong IPC improvement |
− | ** AI workload improvement | + | ** AI workload improvement |
** Network/5G performance improvements | ** Network/5G performance improvements | ||
* New security features | * New security features | ||
− | |||
− | |||
− | |||
− | |||
− | |||
− | |||
− | |||
− | |||
− | |||
− | |||
{{expand list}} | {{expand list}} | ||
== Bibliography == | == Bibliography == | ||
* Intel Architecture Day 2018, December 11, 2018 | * Intel Architecture Day 2018, December 11, 2018 | ||
− |
Facts about "Golden Cove - Microarchitectures - Intel"
codename | Golden Cove + |
designer | Intel + |
first launched | November 4, 2021 + |
full page name | intel/microarchitectures/golden cove + |
instance of | microarchitecture + |
instruction set architecture | x86-64 + |
manufacturer | Intel + |
microarchitecture type | CPU + |
name | Golden Cove + |
process | 10 nm (0.01 μm, 1.0e-5 mm) + |