From WikiChip
Editing intel/cores/silverthorne
Warning: You are not logged in. Your IP address will be publicly visible if you make any edits. If you log in or create an account, your edits will be attributed to your username, along with other benefits.
The edit can be undone.
Please check the comparison below to verify that this is what you want to do, and then save the changes below to finish undoing the edit.
This page supports semantic in-text annotations (e.g. "[[Is specified as::World Heritage Site]]") to build structured and queryable content provided by Semantic MediaWiki. For a comprehensive description on how to use annotations or the #ask parser function, please have a look at the getting started, in-text annotation, or inline queries help pages.
Latest revision | Your text | ||
Line 1: | Line 1: | ||
− | {{intel title|Silverthorne|core}} | + | {{intel title|Silverthorne|l=core}} |
{{core | {{core | ||
| name = Silverthorne | | name = Silverthorne | ||
Line 10: | Line 10: | ||
| developer = Intel | | developer = Intel | ||
| manufacturer = Intel | | manufacturer = Intel | ||
− | | first announced = April | + | | first announced = April 2, 2008 |
| first launched = April 2, 2008 | | first launched = April 2, 2008 | ||
| isa = x86-32 | | isa = x86-32 | ||
Line 24: | Line 24: | ||
| socket 2 = BGA-441 | | socket 2 = BGA-441 | ||
− | | succession = | + | | succession = <!-- yes for succession info --> |
− | | predecessor = | + | | predecessor = |
− | | predecessor link = | + | | predecessor link = |
− | | successor = | + | | successor = |
− | | successor link = | + | | successor link = |
}} | }} | ||
− | '''Silverthorne''' is the core name for [[Intel]]'s first generation of {{intel|Atom}} processors based on the {{intel|Bonnell|l=arch}} microarchitecture | + | '''Silverthorne''' is the core name for [[Intel]]'s first generation of {{intel|Atom}} processors based on the {{intel|Bonnell|l=arch}} microarchitecture. Those ultra-low power chips were manufactured on Intel's [[45 nm process]] and were specifically aimed for the [[Mobile Internet device]] (MID) market. Silverthorne-based processors are {{arch|32}} [[x86]] single core processors with TDP ranging from just 650 mW to 2.5 W. |
== Overview == | == Overview == | ||
Line 36: | Line 36: | ||
=== Common Features === | === Common Features === | ||
+ | [[File:AtomChipset-Processor Ruler.jpg|right|thumb|Processor next to its chipset.]] | ||
* '''TDP:''' 650 mW - 2.5 W | * '''TDP:''' 650 mW - 2.5 W | ||
* '''ISA:''' Everything up to {{x86|SSSE3}} ({{x86|SMM}}, {{x86|FPU}}, {{x86|NX}}, {{x86|MMX}}, {{x86|SSE}}, {{x86|SSE2}}, {{x86|SSE3}}, {{x86|SSSE3}}) | * '''ISA:''' Everything up to {{x86|SSSE3}} ({{x86|SMM}}, {{x86|FPU}}, {{x86|NX}}, {{x86|MMX}}, {{x86|SSE}}, {{x86|SSE2}}, {{x86|SSE3}}, {{x86|SSSE3}}) | ||
Line 42: | Line 43: | ||
* {{intel|Poulsbo|l=chipset}} Chipset | * {{intel|Poulsbo|l=chipset}} Chipset | ||
* 47,212,207 transistors | * 47,212,207 transistors | ||
− | * 3.1 mm x 7.8 mm | + | * 24.18 mm² die size (3.1 mm x 7.8 mm) |
− | |||
− | |||
== Members == | == Members == | ||
Line 57: | Line 56: | ||
<table class="comptable sortable tc13 tc14 tc15 tc16 tc17 tc18 tc19 tc20 tc21 tc22"> | <table class="comptable sortable tc13 tc14 tc15 tc16 tc17 tc18 tc19 tc20 tc21 tc22"> | ||
<tr class="comptable-header"><th> </th><th colspan="20">List of Silverthorne-based Atom Processors</th></tr> | <tr class="comptable-header"><th> </th><th colspan="20">List of Silverthorne-based Atom Processors</th></tr> | ||
− | <tr class="comptable-header"><th> </th><th colspan=" | + | <tr class="comptable-header"><th> </th><th colspan="8">Main processor</th><th colspan="2">Bus</th><th colspan="3">Features</th></tr> |
− | {{comp table header 1|cols= | + | {{comp table header 1|cols=Price, Process, Launched, C, T, Freq, TDP, SDP, Speed, Rate, Package, {{intel|Hyper-Threading|HT}}, VT-x}} |
− | {{#ask: [[Category:microprocessor models by intel]] [[instance of::microprocessor]] [[core name::Silverthorne]] | + | {{#ask: [[Category:microprocessor models by intel]] [[instance of::microprocessor]] [[microprocessor family::Atom]] [[core name::Silverthorne]] |
|?full page name | |?full page name | ||
|?model number | |?model number | ||
− | |||
|?release price | |?release price | ||
|?process | |?process | ||
Line 78: | Line 76: | ||
|format=template | |format=template | ||
|template=proc table 3 | |template=proc table 3 | ||
− | |userparam= | + | |userparam=15:14 |
|mainlabel=- | |mainlabel=- | ||
}} | }} | ||
− | {{comp table count|ask=[[Category:microprocessor models by intel]] [[instance of::microprocessor]] [[core name::Silverthorne]]}} | + | {{comp table count|ask=[[Category:microprocessor models by intel]] [[instance of::microprocessor]] [[microprocessor family::Atom]] [[core name::Silverthorne]]}} |
</table> | </table> | ||
{{comp table end}} | {{comp table end}} | ||
== Die Shot == | == Die Shot == | ||
− | |||
{{see also|intel/microarchitectures/bonnell#Silverthorne|l1=Bonnell § Silverthorne Die}} | {{see also|intel/microarchitectures/bonnell#Silverthorne|l1=Bonnell § Silverthorne Die}} | ||
* [[45 nm process]] | * [[45 nm process]] | ||
Line 100: | Line 97: | ||
== See Also == | == See Also == | ||
− | {{intel | + | * {{intel|Bonnell|l=arch}} |
* {{amd|Geode NX}} | * {{amd|Geode NX}} |
Facts about "Silverthorne - Cores - Intel"
designer | Intel + |
first announced | April 18, 2007 + |
first launched | April 2, 2008 + |
instance of | core + |
isa | x86-32 + |
main image | + and + |
main image caption | Packaged in FCBGA-441 (13x14) + and Packaged in FCBGA-437 (22x22) + |
manufacturer | Intel + |
microarchitecture | Bonnell + |
name | Silverthorne + |
process | 45 nm (0.045 μm, 4.5e-5 mm) + |
technology | CMOS + |
word size | 32 bit (4 octets, 8 nibbles) + |