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|name=Kaby Lake R | |name=Kaby Lake R | ||
|no image=Yes | |no image=Yes | ||
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|developer=Intel | |developer=Intel | ||
|manufacturer=Intel | |manufacturer=Intel | ||
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|proc=14 nm | |proc=14 nm | ||
|tech=CMOS | |tech=CMOS | ||
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|predecessor=Kaby Lake U | |predecessor=Kaby Lake U | ||
|predecessor link=intel/cores/kaby lake u | |predecessor link=intel/cores/kaby lake u | ||
− | |successor= | + | |successor=Coffee Lake U |
− | |successor link=intel/cores/ | + | |successor link=intel/cores/coffee lake u |
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}} | }} | ||
− | '''Kaby Lake R''' ('''KBL-R''') is the name of the core for [[Intel]]'s line of low-power mobile processors based on the {{intel|Kaby Lake|l=arch}} microarchitecture serving as a refresh to {{intel|Kaby Lake U|l=core}}. These chips are primarily targeted towards light notebooks and laptops, portable all-in-ones (AiOs), minis, and conference rooms. | + | '''Kaby Lake R''' ('''KBL-R''') is the name of the core for [[Intel]]'s line of low-power mobile processors based on the {{intel|Kaby Lake|l=arch}} microarchitecture serving as a refresh to {{intel|Kaby Lake U|l=core}}. These chips are primarily targeted towards light notebooks and laptops, portable all-in-ones (AiOs), minis, and conference rooms. Coffee Lake U processors are fabricated on Intel's 2nd generation enhanced [[14 nm lithography process|14nm+ process]]. |
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== Overview == | == Overview == | ||
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** 32 GiB | ** 32 GiB | ||
* 12x PCIe | * 12x PCIe | ||
− | * [[ | + | * [[quad-core]] with 8 threads |
* Everything up to AVX2 (SMM, FPU, NX, MMX, SSE, SSE2, SSE3, SSSE3, SSE4.1, SSE4.2, AES, AVX1, AVX2) | * Everything up to AVX2 (SMM, FPU, NX, MMX, SSE, SSE2, SSE3, SSSE3, SSE4.1, SSE4.2, AES, AVX1, AVX2) | ||
− | + | * Support [[AHCI]], [[High Definition Audio]], 4-6x [[USB 3.0]] ports, 8-10x [[USB 2.0]] ports, 2-4x [[SATA III]], 6x [[I2C]], 3x [[UART]], 1x [[SDXC]] | |
− | * Support [[AHCI]], [[High Definition Audio]], 6x [[USB 3.0]] ports, 10x [[USB 2.0]] ports, 4x [[SATA III]], 6x [[I2C]], 3x [[UART]], 1x [[SDXC]] | ||
* Graphics | * Graphics | ||
− | ** {{intel| | + | ** {{intel|HD Graphics 620}} ({{intel|Gen9.5|l=arch}} GT2) |
** 3 independent displays supported | ** 3 independent displays supported | ||
− | ** Base frequency of | + | ** Base frequency of 350 MHz |
** Burst frequency of 1-1.15 GHz | ** Burst frequency of 1-1.15 GHz | ||
{{clear}} | {{clear}} | ||
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== Kaby Lake R Processors == | == Kaby Lake R Processors == | ||
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</table> | </table> | ||
{{comp table end}} | {{comp table end}} | ||
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== See also == | == See also == | ||
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{{intel kaby lake core see also}} | {{intel kaby lake core see also}} |
Facts about "Kaby Lake R - Cores - Intel"
Has subobject "Has subobject" is a predefined property representing a container construct and is provided by Semantic MediaWiki. | Kaby Lake R - Cores - Intel#package + |
designer | Intel + |
first announced | August 21, 2017 + |
first launched | August 21, 2017 + |
instance of | core + |
isa | x86-64 + |
main image | + and + |
main image caption | Package front side + and Package back side + |
manufacturer | Intel + |
microarchitecture | Kaby Lake + |
name | Kaby Lake R + |
package | FCBGA-1356 + |
process | 14 nm (0.014 μm, 1.4e-5 mm) + |
technology | CMOS + |
word size | 64 bit (8 octets, 16 nibbles) + |