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{{core | {{core | ||
|name=Hewitt Lake | |name=Hewitt Lake | ||
− | |image= | + | |image=broadwell de (front).png |
|developer=Intel | |developer=Intel | ||
|manufacturer=Intel | |manufacturer=Intel | ||
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All models have all the following features in common: | All models have all the following features in common: | ||
− | * '''TDP:''' | + | * '''TDP:''' 27-65 W |
* '''Mem:''' 128 GiB dual-channel DDR4 ECC memory up to 2133/2400 MT/s. (128 GiB @ [[RDIMM]] 32 GiB/DIMM, 64 GiB @ UDIMM/SODIMM 16 GiB/DIMM | * '''Mem:''' 128 GiB dual-channel DDR4 ECC memory up to 2133/2400 MT/s. (128 GiB @ [[RDIMM]] 32 GiB/DIMM, 64 GiB @ UDIMM/SODIMM 16 GiB/DIMM | ||
* '''I/O:''' 32 PCIe 3/2 lanes (x24 Gen3 + x8 Gen2) | * '''I/O:''' 32 PCIe 3/2 lanes (x24 Gen3 + x8 Gen2) | ||
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* '''N''' - Integrated Ethernet and Intel's {{intel|QuickAssist}} technology | * '''N''' - Integrated Ethernet and Intel's {{intel|QuickAssist}} technology | ||
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== Hewitt Lake Processors== | == Hewitt Lake Processors== |
Facts about "Hewitt Lake - Cores - Intel"
designer | Intel + |
first announced | February 25, 2019 + |
first launched | April 2, 2019 + |
instance of | core + |
isa | x86-64 + |
isa family | x86 + |
main image | + |
manufacturer | Intel + |
microarchitecture | Broadwell (Server) + |
name | Hewitt Lake + |
process | 14 nm (0.014 μm, 1.4e-5 mm) + |
technology | CMOS + |
word size | 64 bit (8 octets, 16 nibbles) + |